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PI74FCT162373TVX PDF预览

PI74FCT162373TVX

更新时间: 2024-10-28 13:12:19
品牌 Logo 应用领域
百利通 - PERICOM 锁存器
页数 文件大小 规格书
7页 70K
描述
Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, PLASTIC, SSOP-48

PI74FCT162373TVX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP,
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.14其他特性:MAX OUTPUT SKEW = 0.5NS; TYPICAL VOLP < 0.6V AT VCC = 5V, TA = 25 DEGREE C
系列:FCTJESD-30 代码:R-PDSO-G48
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):13 ns认证状态:Not Qualified
座面最大高度:2.794 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.49 mm
Base Number Matches:1

PI74FCT162373TVX 数据手册

 浏览型号PI74FCT162373TVX的Datasheet PDF文件第2页浏览型号PI74FCT162373TVX的Datasheet PDF文件第3页浏览型号PI74FCT162373TVX的Datasheet PDF文件第4页浏览型号PI74FCT162373TVX的Datasheet PDF文件第5页浏览型号PI74FCT162373TVX的Datasheet PDF文件第6页浏览型号PI74FCT162373TVX的Datasheet PDF文件第7页 
PI74FCT16373T
PI74FCT162373T  
PI74FCT162H373T  
Fast CMOS 16-Bit  
Transparent Latches  
ProductFeatures:  
CommonFeatures:  
Product Description:  
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-  
duced in the Company’s advanced 0.6 micron CMOS technology,  
achieving industry leading speed grades.  
• PI74FCT16373T,PI74FCT162373T,andPI74FCT162H373Tare  
high-speed,  
low power devices with high current drive.  
• Vcc=5V±10%  
• Hysteresis on all inputs  
• Packagesavailable:  
48-pin240milwideplasticTSSOP(A)  
48-pin300milwideplasticSSOP(V)  
PI74FCT16373TFeatures:  
• High output drive: IOH = –32 mA; IOL = 64 mA  
• Power off disable outputs permit "live insertion"  
ThePI74FCT16373T,PI74FCT162373T,andPI74FCT162H373T  
are 16-bit transparent latches designed with 3-state outputs and are  
intended for bus oriented applications. The Output Enable and  
Latch Enable controls are organized to operate as two 8-bit latches  
orone16-bitlatch. WhenLatchEnable(LE)isHIGH,theflip-flops  
appear transparent to the data. The data that meets the set-up time  
when LE is LOW is latched. When OE is HIGH, the bus output is  
in the high impedance state.  
• Typical VOLP (Output Ground Bounce) < 1.0V  
atVCC =5V,TA =25°C  
PI74FCT162373TFeatures:  
The PI74FCT16373T output buffers are designed with a Power-  
Off disable allowing “live insertion” of boards when used as  
backplane drivers.  
• Balanced output drivers: ±24 mA  
• Reduced system switching noise  
• Typical VOLP (Output Ground Bounce) < 0.6V  
atVCC =5V,TA =25°C  
The PI74FCT162373T has ±24 mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
PI74FCT162H373TFeatures:  
• Bus Hold retains last active bus state during 3-state  
• Eliminates the need for external pull-up resistors  
The PI74FCT162H373T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floatinginputsandeliminatingtheneedforpull-up/downresistors.  
Logic Block Diagram  
1OE  
1LE  
2OE  
2LE  
1D0  
2D0  
D
C
D
C
1O0  
2O0  
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
PS2033A 03/11/96  
1

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