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PI74ALVTC16245VE PDF预览

PI74ALVTC16245VE

更新时间: 2024-10-27 22:44:27
品牌 Logo 应用领域
百利通 - PERICOM 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
10页 214K
描述
16-Bit BiDirectional Transceiver with 3-State Outputs

PI74ALVTC16245VE 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SSOP
针数:48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
逻辑集成电路类型:BUS TRANSCEIVERBase Number Matches:1

PI74ALVTC16245VE 数据手册

 浏览型号PI74ALVTC16245VE的Datasheet PDF文件第2页浏览型号PI74ALVTC16245VE的Datasheet PDF文件第3页浏览型号PI74ALVTC16245VE的Datasheet PDF文件第4页浏览型号PI74ALVTC16245VE的Datasheet PDF文件第5页浏览型号PI74ALVTC16245VE的Datasheet PDF文件第6页浏览型号PI74ALVTC16245VE的Datasheet PDF文件第7页 
PI74ALVTC16245  
16-Bit BiDirectional Transceiver  
with 3-State Outputs  
Features  
Description  
• PI74ALVTC family is designed for low voltage operation,  
VDD = 1.8V to 3.6V  
PericomSemiconductor’sPI74ALVTC16245isa16-bitbidirectional  
transceiver designed for asynchronous two-way communication  
between data buses. The direction control input pin (xDIR)  
determines the direction of data flow through the bidirectional  
transceiver.TheDirectionandOutputEnablecontrolsaredesigned  
to operate this device as either two independent 8-bit transceivers  
orone16-bittransceiver.Theoutputenable(OE)input,whenHIGH,  
disables both A and B ports by placing them in Hi-Z condition.  
• Supports Live Insertion  
• 3.6V I/O Tolerant Inputs and Outputs  
• Bus Hold  
• High Drive, -32/64mA @ 3.3V  
• Uses patented noise reduction circuitry  
• Power-off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packaging(Pb-free&Greenavailable):  
48-pin240-milwideplasticTSSOP(A)  
48-pin173-milwideplastic TVSOP(K)  
48-pin300-milwideplastic SSOP(V)  
To ensure the high-impedance state during power up or power  
down, OE should be tied to Vdd through a pullup resistor; the  
minimumvalueoftheresistorisdeterminedbythecurrent-sinking  
capability of the driver.  
The family offers both I/O Tolerant, which allows it to operate in  
mixed 1.8/3.6V systems, and “Bus Hold,” which retains the data  
input’s last state whenever the data input goes to high-impedance,  
preventing “floating” inputs and eliminating the need for pullup/  
down resistors.  
BlockDiagram  
1DIR  
2DIR  
1OE  
2OE  
1A  
1A  
1A  
1A  
1A  
0
1
2
3
4
2
A
A
A
0
1
3
1B0  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
2B0  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2
2
2
2
2
2
2
A
4
A
A
A
A
5
6
7
8
1A5  
1A  
6
7
1A  
PS8354B  
09/22/04  
1

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