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PI6CL10804 PDF预览

PI6CL10804

更新时间: 2024-11-27 14:55:43
品牌 Logo 应用领域
美台 - DIODES /
页数 文件大小 规格书
6页 518K
描述
1.2V/1.5V, 200MHz, 1:4 Networking Clock Buffer

PI6CL10804 数据手册

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PI6CL10804  
1.2V/1.5V, 200MHz, 1:4 Networking Clock Buffer  
Features  
Description  
•ꢀ High-speed,ꢀlow-noise,ꢀnon-invertingꢀ1:4ꢀbufferꢀ  
•ꢀ MaximumꢀFrequencyꢀupꢀtoꢀ200ꢀMHz  
•ꢀ Lowꢀoutputꢀskewꢀ<ꢀ100psꢀ  
•ꢀ Lowꢀpropagationꢀdelayꢀ<ꢀ3.5ns  
•ꢀ Optimizedꢀdutyꢀcycle  
Theꢀ PI6CL10804ꢀ isꢀ aꢀ 1.2Vꢀ orꢀ 1.5Vꢀ high-speed,ꢀ low-noiseꢀ  
1:4ꢀ non-invertingꢀ clockꢀ buffer.ꢀ Theꢀ keyꢀ goalꢀ inꢀ designingꢀ theꢀ  
PI6CL10804ꢀ ꢀ isꢀ toꢀ targetꢀ networkingꢀ applicationsꢀ thatꢀ requireꢀ  
low-skew,ꢀlow-jitter,ꢀandꢀhigh-frequencyꢀclockꢀdistribution.ꢀ  
Providingꢀoutput-to-outputꢀskewꢀasꢀlowꢀasꢀ100ps,ꢀtheꢀPI6CL10804ꢀ  
isꢀanꢀidealꢀclockꢀdistributionꢀdeviceꢀforꢀsynchronousꢀsystems.ꢀDe-  
signingꢀsynchronousꢀnetworkingꢀsystemsꢀrequiresꢀaꢀtightꢀlevelꢀofꢀ  
skewꢀfromꢀaꢀlargeꢀnumberꢀofꢀoutputs.  
•ꢀꢀ3.3Vꢀtolerentꢀinput  
•ꢀ 1.2Vꢀorꢀ1.5Vꢀsupplyꢀvoltage  
•ꢀ Packagesꢀ(Pb-freeꢀ&ꢀGreenꢀavailable):  
-8-pinꢀSOICꢀ(W)  
Block Diagram  
Pin Configuration  
OE  
1
2
3
4
8
7
6
5
BUF_IN  
CLK0  
OE  
V
DD  
CLK0  
CLK1  
GND  
CLK1  
CLK3  
CLK2  
BUF_IN  
CLK2  
CLK3  
Pin Description  
Pin Name  
Description  
BUF_IN  
CLK [0:3]  
GND  
Input  
Outputs  
Ground  
Power  
V
DD  
OE  
Output Enable  
PI6CL10804 Rev B  
08/09/2013  
13-0130  
1

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