Datasheet > PI6C2309-1W

PI6C2309-1W

更新时间： 2024-11-25 23:27:39

品牌	Logo	应用领域
其他 - ETC		时钟驱动器
页数	文件大小	规格书
9页	575K
描述
Nine Distributed-Output Clock Driver

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中文翻译

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数据手册

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PI6C2309-1W 数据手册

PI6C2305/PI6C2309

Zero-Delay Clock Buffer

ProductFeatures

FunctionalDescription

• Maximumratedfrequency:133MHz

• Lowcycle-to-cyclejitter

The PI6C230x is a PLL based, zero-delay buffer, with the ability

todistributefiveoutputsonPI6C2305,nineoutputsonPI6C2309of

up to 133MHz at 3.3V. All the outputs are distributed from a single

clockinputCLKINandoutputCLK0performszerodelaybyconnect-

ing a feedback to PLL.

• Input to output delay, less than 200ps

• Internal feedback allows outputs to be synchronized

to the clock input

PI6C2309 has two banks of four outputs that can be controlled by

theselectioninputs,SEL1&SEL2.Italsohasapowersparingfeature:

when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all

outputs are referenced from CLKIN. PI6C2305 is an 8-pin version

of PI6C2309 without selection inputs. PI6C230X is available in

high drive and industrial environment versions.

• 5V tolerant input*

• Operatesat3.3VV_DD

• Space-saving Packages:

150-milSOIC (W)

173-milTSSOP (L)

* FB_IN and CLKIN must reference the same voltage thresh-

olds for the PLL to deliver zero delay skewing

An internal feedback on OUT0 is used to synchronize the outputs

to the input; the relationship between loading of this signal

and the outputs determines the input-output delay.

PI6C230X are characterized for both commercial and industrial

operation

Notice: This device is subject to import restriction. Please refer

to the Import Restriction Notice under the Ordering Information

section.

BlockDiagram:PI6C2309

PinConfigurationPI6C2309

OUT0

PLL

OUTA1

OUTA2

OUTA3

OUTA4

MUX

CLKIN

OUTA1

OUTA2

15 OUTA4

OUT0

SEL1

SEL2

Decode

Logic

OUTA3

16-Pin

W,L

GND

OUTB1

OUTB2

SEL2

OUTB1

OUTB2

OUTB3

OUTB4

OUTB3

SEL1

PI6C2309 (-1, -1H)

BlockDiagram:PI6C2305

PinConfiguration:PI6C2305

CLKIN

CLK0

CLK4

OUT0

OUT1

OUT2

OUT3

OUT4

8-Pin

W,L

CLK2

PLL

CLKIN

CLK1

GND

CLK3

PI6C2305(–1, –1H)

PS8478B

10/30/01

12 3 4 5 6 7...9

中文翻译

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与PI6C2309-1W相关器件

型号	品牌	获取价格	描述	数据表
PI6C2309-1WI	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 9 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 0
PI6C2309-1WIX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 9 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 I
PI6C2310	PERICOM	获取价格	Low skew, low jitter, PLL clock buffer with divider or multiplier
PI6C2310L	PERICOM	获取价格	Low skew, low jitter, PLL clock buffer with divider or multiplier
PI6C2310LX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), PDSO24, 4.40 MM
PI6C2310Q	PERICOM	获取价格	Low skew, low jitter, PLL clock buffer with divider or multiplier
PI6C2310QX	PERICOM	获取价格	暂无描述
PI6C2401	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2401W	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2401WE	PERICOM	获取价格	Phase-Locked Loop Clock Driver