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PI49FCT20807HEX PDF预览

PI49FCT20807HEX

更新时间: 2024-11-26 21:02:55
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美台 - DIODES /
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6页 773K
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PI49FCT20807HEX 数据手册

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PI49FCT20807  
1-10 Clock Buffer for Networking Applications  
Features  
Description  
•ꢀ HighꢀFrequencyꢀꢀ>150ꢀMHz  
eꢀ PI49FCT20807,ꢀ aꢀ 2.5Vꢀ compatible,ꢀ high-speed,ꢀ low-noiseꢀ  
1-10ꢀnon-invertingꢀclockꢀbuffer,ꢀisꢀdesignedꢀtoꢀtargetꢀnetworkingꢀ  
applicationsꢀthatꢀrequireꢀlow-skew,ꢀlow-jitter,ꢀandꢀhigh-frequen-  
cyꢀclockꢀdistribution.ꢀProvidingꢀoutput-to-outputꢀskewꢀasꢀlowꢀasꢀ  
150ps,ꢀtheꢀPI49FCT20807ꢀisꢀanꢀidealꢀclockꢀdistributionꢀdeviceꢀforꢀ  
synchronoussystems.Designingsynchronousnetworkingsys-  
temsꢀrequiresꢀaꢀtightꢀlevelꢀofꢀskewꢀfromꢀaꢀlargeꢀnumberꢀofꢀoutputs.  
•ꢀ High-speed,ꢀlow-noise,ꢀnon-invertingꢀ1-10ꢀbufferꢀ  
•ꢀ Low-skewꢀ(<150ps)ꢀbetweenꢀanyꢀtwoꢀoutputꢀclocksꢀ  
•ꢀ Lowꢀdutyꢀcycleꢀdistortionꢀ<300psꢀ  
•ꢀ Lowꢀpropagationꢀdelayꢀ<3.5ns  
•ꢀ MultipleꢀVDD,ꢀGNDꢀpinsꢀforꢀnoiseꢀreduction  
•ꢀ 2.5Vꢀsupplyꢀvoltageꢀandꢀ3Vꢀtolerantꢀinput  
•ꢀ Packagingꢀ(Pb-freeꢀ&ꢀGreenꢀavailable):ꢀ  
-20-pinꢀSSOPꢀ(H)ꢀ  
-20-pinꢀQSOPꢀ(Q)  
Pin Description  
Pin Name  
Description  
BUF_IN  
Input  
CLK [0:9]  
GND  
Outputs  
Ground  
Power  
VDD  
Block Diagram  
Pin Configuration  
CLK0  
BUF_IN  
1
V
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DD  
GND  
2
CLK9  
CLK1  
CLK0  
3
CLK8  
GND  
CLK7  
BUF_IN  
V
4
DD  
20-Pin  
H, Q  
CLK2  
CLK3  
CLK1  
GND  
5
V
6
DD  
CLK2  
CLK6  
GND  
CLK5  
CLK4  
7
V
8
DD  
CLK3  
GND  
9
10  
CLK9  
www.pericom.com  
09/25/14  
1

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