PHT
Vishay Sfernice
www.vishay.com
High Stability - High Temperature (230 °C)
Thin Film Wraparound Chip Resistors, Sulfur Resistant
FEATURES
• Operating temperature range:
-55 °C; +215 °C
• Storage temperature: -55 °C; +230 °C
• Gold terminations (< 1 μm thick)
• 5 sizes available (0402, 0603, 0805, 1206,
2010); other sizes upon request
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DESIGN SUPPORT TOOLS
• Temperature coefficient down to 15 ppm
(-55 °C; +215 °C)
Models
• Tolerance down to 0.05 %
Available
• Load life stability: 0.35 % max. after 2000 h at 220 °C
(ambient) at Pn
INTRODUCTION
For applications such as down hole applications, the need
for parts able to withstand very severe conditions
(temperature as high as 215 °C powered or up to 230 °C
un-powered) has leaded Vishay Sfernice to push out the
limit of the thin film technology.
Designers might read the application note: Power
Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays
(P, PRA etc…) (High Temperature Application)
www.vishay.com/doc?53047 in conjunction with this
datasheet to help them to properly design their PCBs and
get the best performances of the PHT.
• Shelf life stability: 0.7 % typ. (1 % max.) after 15 000 h at
230 °C
• SMD wraparound
• TCR remains constant after long term storage at 230 °C
(15 000 h)
• Sulfur resistant (per ASTM B809-95 humid vapor test)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
Vishay Sfernice R&D engineers will be willing to support any
customer design considerations.
STANDARD ELECTRICAL SPECIFICATIONS
RESISTANCE RATED POWER (1)(2) LIMITING ELEMENT
TEMPERATURE
COEFFICIENT (3)
ppmꢁ°C
TOLERANCE (2)
ꢀ
MODEL
SIZE
RANGE
P215 °C
VOLTAGE
V
W
PHT0402
PHT0603
PHT0805
PHT1206
PHT2010
0402
0603
0805
1206
2010
10 to 130K
10 to 320K
10 to 720K
10 to 2.7M
10 to 7.5M
0.0189
0.0375
0.06
50
75
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
150
200
300
0.1
0.2 (4)
Notes
(1)
For power handling improvement, please refer to application note 53047: “Power Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays (High Temperature Applications)” www.vishay.com/doc?53047 and consult Vishay Sfernice
See Table 2 on next page
(2)
(3)
(4)
See Table 1 on next page
It is possible to dissipate up to 0.3 W, but there will be an additional drift of 0.1 % after load life
CLIMATIC SPECIFICATIONS
MECHANICAL SPECIFICATIONS
Substrate
Alumina
Operating temperature range
-55 °C; +215 °C
Resistive Element
Passivation
Protection
Nichrome (NiCr)
Silicon nitride (Si3N4)
Storage temperature range
-55 °C; +230 °C
Epoxy + silicone
Terminations
Gold (< 1 μm) over nickel barrier
PERFORMANCE VS. HUMID SULFUR VAPOR
Note
For other terminations, please consult
50 °C 2 °C, 85 % 4 % RH,
•
Test conditions
exposure time 500 h
Resistance drift < (0.05 % R + 0.05 ),
Test results
no corrosion products observed
Revision: 03-Jan-2019
Document Number: 53050
1
For technical questions, contact: sferthinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000