Datasheet > Z0103MA0412

Z0103MA0412

更新时间： 2022-03-29 07:51:17

品牌	Logo	应用领域
恩智浦 - NXP		可控硅
页数	文件大小	规格书
13页	174K
描述
4Q Triac Direct interfacing to logic level ICs

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Z0103MA0412 数据手册

Z0103MA0

4Q Triac

Rev. 01 — 3 January 2011

Product data sheet

1. Product profile

1.1 General description

Planar passivated sensitive gate four quadrant triac in a SOT54 (TO-92) plastic package

intended for use in applications requiring enhanced noise immunity and direct interfacing

to logic ICs and low power gate drivers.

1.2 Features and benefits

Direct interfacing to logic level ICs

Enhanced current surge capability

Enhanced noise immunity

High blocking voltage capability

Sensitive gate triggering in all four

quadrants

1.3 Applications

General purpose low power motor

Industrial process control

control

Low power AC Fan controllers

Home appliances

1.4 Quick reference data

Table 1.

Symbol

V_DRM

Quick reference data

Parameter

Conditions

Min Typ Max Unit

repetitive peak off-state

voltage

600

I_TSM

non-repetitive peak

on-state current

full sine wave; T_j(init)= 25 °C;

t_p= 20 ms; see Figure 4;

see Figure 5

12.5

I_T(RMS)

RMS on-state current

full sine wave; T_lead≤ 38 °C;

see Figure 3; see Figure 1;

see Figure 2

Static characteristics

I_GTgate trigger current

V_D= 12 V; I_T= 0.1 A; T2+ G+;

T_j= 25 °C; see Figure 7

0.2

V_D= 12 V; I_T= 0.1 A; T2+ G-;

T_j= 25 °C; see Figure 7

V_D= 12 V; I_T= 0.1 A; T2- G-;

T_j= 25 °C; see Figure 7

V_D= 12 V; I_T= 0.1 A; T2- G+;

T_j= 25 °C; see Figure 7

12 3 4 5 6 7...13

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