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PCA9537DP PDF预览

PCA9537DP

更新时间: 2024-01-28 19:45:25
品牌 Logo 应用领域
恩智浦 - NXP 并行IO端口微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
24页 136K
描述
4-bit I2C-bus and SMBus low power I/O port with interrupt and reset

PCA9537DP 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP, TSSOP10,.19,20Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
JESD-30 代码:R-PDSO-G10JESD-609代码:e0
位数:4端子数量:10
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP10,.19,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:2.5/5 V
认证状态:Not Qualified子类别:Parallel IO Port
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUALBase Number Matches:1

PCA9537DP 数据手册

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PCA9537  
4-bit I2C-bus and SMBus low power I/O port with interrupt and  
reset  
Rev. 05 — 7 May 2009  
Product data sheet  
1. General description  
The PCA9537 is a 10-pin CMOS device that provides 4 bits of General Purpose parallel  
Input/Output (GPIO) expansion with interrupt and reset for I2C-bus/SMBus applications  
and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders.  
I/O expanders provide a simple solution when additional I/O is needed for ACPI power  
switches, sensors, push-buttons, LEDs, fans, etc.  
The PCA9537 consists of a 4-bit Configuration register (input or output selection),  
4-bit Input Port register, 4-bit Output Port register and a 4-bit Polarity Inversion register  
(active HIGH or active LOW operation). The system master can enable the I/Os as either  
inputs or outputs by writing to the I/O configuration bits. The data for each input or output  
is kept in the corresponding Input Port or Output Port register. The polarity of the Input  
Port register can be inverted with the Polarity Inversion register. All registers can be read  
by the system master.  
The PCA9537 open-drain interrupt output (INT) is activated when any input state differs  
from its corresponding Input Port register state and is used to indicate to the system  
master that an input state has changed. The power-on reset sets the registers to their  
default values and initializes the device state machine. The RESET pin causes the same  
reset/initialization to occur without de-powering the device.  
The I2C-bus address is fixed and allows only one device on the same I2C-bus/SMBus.  
2. Features  
I 4-bit I2C-bus GPIO with interrupt and reset  
I Operating power supply voltage range of 2.3 V to 5.5 V  
I 5 V tolerant I/Os  
I Polarity Inversion register  
I Active LOW interrupt output  
I Active LOW reset input  
I Low standby current  
I Noise filter on SCL/SDA inputs  
I No glitch on power-up  
I Internal power-on reset  
I 4 I/O pins that default to 4 inputs  
I 0 Hz to 400 kHz clock frequency  
I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per  
JESD22-A115 and 1000 V CDM per JESD22-C101  

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