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PDTC115EMB,315 PDF预览

PDTC115EMB,315

更新时间: 2024-11-26 20:08:27
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管
页数 文件大小 规格书
11页 698K
描述
PDTC115EMB - NPN resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ DFN 3-Pin

PDTC115EMB,315 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:DFN针数:3
Reach Compliance Code:compliant风险等级:5.79
Base Number Matches:1

PDTC115EMB,315 数据手册

 浏览型号PDTC115EMB,315的Datasheet PDF文件第2页浏览型号PDTC115EMB,315的Datasheet PDF文件第3页浏览型号PDTC115EMB,315的Datasheet PDF文件第4页浏览型号PDTC115EMB,315的Datasheet PDF文件第5页浏览型号PDTC115EMB,315的Datasheet PDF文件第6页浏览型号PDTC115EMB,315的Datasheet PDF文件第7页 
PDTC115EMB  
SOT883B  
NPN resistor-equipped transistor; R1 = 100 k, R2 = 100 kΩ  
Rev. 1 — 1 June 2012  
Product data sheet  
1. Product profile  
1.1 General description  
NPN Resistor-Equipped Transistor (RET) in a leadless ultra small DFN1006B-3  
(SOT883B) Surface-Mounted Device (SMD) plastic package.  
PNP complement: PDTA115EMB.  
1.2 Features and benefits  
20 mA output current capability  
Reduces component count  
Built-in bias resistors  
Simplifies circuit design  
AEC-Q101 qualified  
Leadless ultra small SMD plastic  
package  
Reduces pick and place costs  
Low package height of 0.37 mm  
1.3 Applications  
Low-current peripheral driver  
Control of IC inputs  
Replaces general-purpose transistors  
in digital applications  
Mobile applications  
1.4 Quick reference data  
Table 1.  
Symbol  
VCEO  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
collector-emitter  
voltage  
open base  
-
-
50  
V
IO  
output current  
-
-
20  
mA  
R1  
bias resistor 1 (input)  
bias resistor ratio  
Tamb = 25 °C  
70  
0.8  
100  
1
130  
1.2  
k  
R2/R1  
 
 
 
 
 

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