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PCF5233CVM150 PDF预览

PCF5233CVM150

更新时间： 2024-11-27 19:31:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 外围集成电路
页数 文件大小 规格书
16页 570K
描述
RISC Microprocessor, 32-Bit, 150MHz, CMOS, PBGA256

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中文翻译

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PCF5233CVM150 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：BGA, BGA256,16X16,40Reach Compliance Code：unknown
风险等级：5.88位大小：32
JESD-30 代码：S-PBGA-B256JESD-609代码：e0
端子数量：256最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装等效代码：BGA256,16X16,40
封装形状：SQUARE封装形式：GRID ARRAY
电源：1.5,3.3 V认证状态：Not Qualified
速度：150 MHz子类别：Microprocessors
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：1 mm
端子位置：BOTTOMuPs/uCs/外围集成电路类型：MICROPROCESSOR, RISC
Base Number Matches：1

PCF5233CVM150 数据手册

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Product Brief  
MCF5235PB/D  
Rev. 0, 5/2004  
MCF523x Family  
Integrated  
Microprocessor  
Product Brief  
The MCF523x is a family of highly-integrated 32-bit microcontrollers based on the V2  
ColdFire microarchitecture. Featuring a 16 or 32 channel eTPU, 64 Kbytes of internal SRAM,  
a 2-bank SDRAM controller, four 32-bit timers with dedicated DMA, a 4 channel DMA  
controller, up to 2 CAN modules, 3 UA a queued SPI, the MCF523x family has been designed  
for general purpose industrial control applications. It is also a high-performance upgrade for  
users of the MC68332. This document provides an overview of the MCF523x microcontroller  
family, focusing on its highly diverse feature set, as well as providing an “at-a-glance”  
comparison to the MC68332.  
This 32-bit device is based on the Version 2 ColdFire reduced instruction set computer (RISC)  
core operating at a core frequency up to 150 MHz and bus frequency up to 75 MHz. On-chip  
modules include:  
•
V2 ColdFire core with enhanced multiply-accumulate unit (EMAC) providing 144  
Dhrystone 2.1 MIPS @ 150 MHz  
•
eTPU with 16 or 32 channels, 6 Kbytes of code memory and 1.5 Kbytes of data  
memory with Nexus Class 1 debug support  
•
•
64 Kbytes of internal SRAM  
External bus speed of one half the CPU operating frequencey (75 MHz bus @ 150  
MHz core)  
•
•
•
•
10/100 Mbps bus-mastering Ethernet controller  
8 Kbytes of configurable instruction/data cache  
Three universal asynchronous receiver/transmitters (UARTs)  
Controller area network 2.0B (FlexCAN) module  
— Optional second FlexCAN module multiplexed with the third UART  
Inter-integrated circuit (I2C™) bus controller  
•
•
•
Queued serial peripheral interface (QSPI) module  
Hardware cryptography accelerator (optional)  
— Random number generator  
— DES/3DES/AES block cipher engine  
— MD5/SHA-1/HMAC accelerator  
•
•
Four channel 32-bit direct memory access (DMA) controller  
Four channel 32-bit input capture/output compare timers with optional DMA support  
1234567...16

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