Datasheet > PCA9460CUK

PCA9460CUK

更新时间： 2024-03-03 10:09:39

品牌	Logo	应用领域
恩智浦 - NXP		双倍数据速率集成电源管理电路光电二极管
页数	文件大小	规格书
107页	1376K
描述
Power Manage IC (PMIC) for i.MX 8ULP + LPDDR3

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PCA9460CUK 数据手册

PCA9460

13-channel power management integrated circuit (PMIC) for ultra-low power

applications

Rev. 3.4 — 10 January 2024

Product data sheet

1 General description

The PCA9460 is a single chip Power Management IC (PMIC) designed to support ultra-low-power applications

where standby power and overall power consumption of power management IC is critical. The PCA9460 is

designed to be paired with i.MX 8ULP processor which enables such key applications. It provides power supply

solutions for low power wearable application where size and efficiency are critical.

The PCA9460 comes equipped with four buck regulators, five LDOs and additional load switches. This design

offers the most flexible configuration for i.MX 8ULP or other processors to enable the ultra-low-power system

design. Each buck regulator has been designed with ultra-low Iq current to reduce standby current. Two

buck regulators support smart Dynamic Voltage Scaling (DVS), which allows the system designed to set the

right voltage on the processors the PCA9460 is powering. This process minimize power consumption that

is controlled through the PMIC_STBY_REQ pin or MODE[2:0] pins. Five LDOs have 300 nA low quiescent

current. One LDO is available for SNVS core power supply, one 250 mA LDO is to regulate to low output

voltage from buck regulator output. Three 250 mA LDOs supply power to the processor and peripheral devices.

Four 150 mΩ load switches switch power for peripheral devices. These switches can be configured as an LED

driver with two different blink modes.

The PCA9460 is offered in a 42-bump wafer-level CSP package, 2.86 mm x 2.46 mm, 0.4 mm pitch.

2 Features and benefits

Ultra-low-power system design for long battery life or green offline performance using:

• Four buck regulators

– Two 1 A buck regulators

– Two 1 A buck regulator with DVS

– Low Iq (1.5 μA at low power mode, 5.5 μA at normal mode)

• Five linear regulators

– One 250 mA NMOS LDO

– Three 250 mA PMOS LDO

– 10 mA SNVS LDO

– Built-in active discharge resistor

• Four Load Switches with active discharge resistor to allow easy connect/disconnect of multiple system rails

– 150 mΩ Rdson

– ON/OFF control in different modes

– Configurable to LED driver with two blink patterns

• Power control IO for intelligent system design

– Power ON/OFF control

– Standby/Run mode control

– Smart DVS control

• Flexible power ON/OFF sequence

12 3 4 5 6 7...107

中文翻译

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