Datasheet > PC8265A

PC8265A

更新时间： 2024-11-14 23:26:39

品牌	Logo	应用领域
其他 - ETC		PC
页数	文件大小	规格书
59页	444K
描述
PC8265A [Updated 9/03. 59 Pages]

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数据手册

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PC8265A 数据手册

Features

• PC603e^™Microprocessor (Embedded PowerPC^™Core) at 133 - 300 MHz

– 280 MIPS at 200 MHz (Dhrystone 2.1)

– 520 MIPS at 300 MHz (Dhrystone 2.1)

– High-performance, Superscalar Microprocessor

– Disable CPU Mode

– Improved Low-power Core

– 16-Kbyte Data and 16-Kbyte Instruction Cache, Four-way Set Associative

– Memory Management Unit (MMU)

– Floating Point Unit (FPU)

– Common On-chip Processor (COP)

• Two Bus Architectures: One 64-bit PowerPC and One 32-bit PCI or Local Bus

• System Integration Unit (SIU)

PowerPC^™-

based

– Memory Controller, Including Two Dedicated SDRAM Machines

– PCI up to 66 MHz

Communications

Processor

– Hardware Bus Monitor and Software Watchdog Timer

– IEEE 1149.1 JTAG Test Access Port

• High-performance Communications Processor Module (CPM)

– CPM Frequency Up to 200 MHz

– PowerPC and CPM May Run at Different Frequencies

– Parallel I/O Registers

– On-board 32 KBytes of Dual-port RAM

– Two Multi-channel Controllers (MCCs) Each Supporting 128 Full-duplex, 64-Kbps,

HDLC Lines

PC8265A

– Virtual DMA Functionality

– 3 FCCs Supporting:

PowerQUICC II^™

Preliminary

Specification

Alpha Site

Up to 155 Mbps ATM SAR, Maximum of Two (AAL0, AAL1, AAL2, AAL5)

10/100 Mbps Ethernet, Up to Three (IEEE 802.3X with Flow Control)

45 Mbps HDLC/Transparent (Up to Three)

• Two UTOPIA Level-2 Master/Slave Ports, Both with Multi-PHY Support. One Can

Support 8/16 bit Data

• Three MII Interfaces

• Eight TDM Interfaces (T1/E1), Two TDM Ports Can Be Glueless to T3/E3

• Power Consumption: 2.5W at 300 MHz

Description

The PC8265A PowerQUICC II^™is a versatile communications processor that inte-

grates on one chip, a high-performance PowerPC (PC603e) RISC microprocessor, a

highly flexible system integration unit, and many communications peripheral control-

lers that can be used in a variety of applications, particularly in communications and

networking systems.

The core is an embedded variant of the PC603e microprocessor, specifically referred

to later in this document as the EC603e, with 16 Kbytes of instruction cache and

16 Kbytes of data cache and floating-point unit (FPU). The system interface unit (SIU)

consists of a flexible memory controller that interfaces to almost any user-defined

memory system, a 60x-to-PCI bus bridge and many other peripherals, making this

device a complete system on a chip.

The communications processor module (CPM) includes all the peripherals found in

the PC860, with the addition of three high-performance communication channels that

support new emerging protocols (for example, 155-Mbps ATM and Fast Ethernet).

Equipped with dedicated hardware, the PC8265A can handle up to 256 full-duplex,

time-division, multiplexed logical channels.

5336A–HIREL–08/03

12 3 4 5 6 7...59

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