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PC56F84550VLF PDF预览

PC56F84550VLF

更新时间: 2024-11-26 21:20:15
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
17页 422K
描述
IC MCU 32BIT 96KB FLASH 48LQFP

PC56F84550VLF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:LFQFP,
Reach Compliance Code:compliant风险等级:5.78
具有ADC:YES地址总线宽度:
位大小:32最大时钟频率:50 MHz
DMA 通道:YES外部数据总线宽度:
长度:7 mm湿度敏感等级:3
I/O 线路数量:39端子数量:48
PWM 通道:YES封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260速度:80 MHz
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3.3 V表面贴装:YES
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:7 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

PC56F84550VLF 数据手册

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Document Number:MC56F847XPB  
Rev. 2, 06/2012  
Freescale Semiconductor  
Product Brief  
MC56F844x/5x/7x Product Brief  
Supports MC56F844x, MC56F845x, MC56F847x  
Contents  
1
Introduction................................................................1  
1 Introduction  
1.1  
1.2  
1.3  
Core Overview...............................................1  
Memory Overview.........................................2  
Peripheral Overview......................................2  
The 56F844x/5x/7x is the initial family of 32-bit 56800EX  
core–based Digital Signal Controllers (DSCs). Each device in  
the family combines, on a single chip, the processing power of  
a 32-bit DSP and the functionality of a microcontroller with a  
flexible set of peripherals. Due to its cost-effectiveness,  
configuration flexibility, and compact program code, the  
56F844x/5x/7x is well-suited for many consumer and  
industrial applications.  
2
3
Application Examples...............................................2  
Features.....................................................................3  
3.1  
MC56F844x/5x/7x Product  
Family............................................................4  
The 56800EX core is based on a dual Harvard-style  
architecture consisting of three execution units operating in  
parallel, allowing as many as six operations per instruction  
cycle. The MCU-style programming model and optimized  
instruction set allow straightforward generation of efficient,  
compact DSP and control code. The instruction set is also  
highly efficient for C compilers to enable rapid development  
of optimized control applications. Additionally, memory  
resource protection (MRP) is provided to protect supervisor  
programs and resources from user programs.  
3.2  
3.3  
Block Diagram...............................................5  
56800EX 32-bit Digital Signal  
Controller Core...............................................6  
3.4  
3.5  
3.6  
Operation Parameters....................................7  
Packages.........................................................7  
On-Chip Memory and Memory  
Protection.......................................................7  
The 56F844x/5x/7x supports up to 100 MHz program  
execution from both internal flash memory and RAM. Both  
on-chip flash memory and RAM can also be mapped into both  
program and data memory spaces. Two data operands can be  
accessed from the on-chip data RAM per instruction cycle.  
3.7  
Peripherals.....................................................8  
4
5
Developer Environment...........................................14  
Document Revision History....................................15  
© 2011–2012 Freescale Semiconductor, Inc.  
General Business Information  
 
 

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