Datasheet > PC56F8006VWL

PC56F8006VWL

更新时间： 2024-11-26 12:02:07

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		控制器
页数	文件大小	规格书
106页	1181K
描述
Digital Signal Controller

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数据手册

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PC56F8006VWL 数据手册

Freescale Semiconductor

Technical Data

Document Number: MC56F8006

Rev. 4, 06/2011

MC56F8006/MC56F8002

48-pin LQFP

Case: 932-03

7 x 7 mm²

32-pin LQFP

Case: 873A-03

7 x 7 mm²

28-pin SOIC

Case: 751F-05

7.5 x 18 mm²

MC56F8006/MC56F8002

Digital Signal Controller

32-pin PSDIP

Case: 1376-02

9 x 28.5 mm²

This document applies to parts marked with 2M53M.

RAM. Program flash memory can be independently bulk

erased or erased in small pages of 512 bytes (256 words).

The 56F8006/56F8002 is a member of the 56800E core-based

family of digital signal controllers (DSCs). It combines, on a

single chip, the processing power of a DSP and the

functionality of a microcontroller with a flexible set of

peripherals to create a cost-effective solution. Because of its

low cost, configuration flexibility, and compact program

code, the 56F8006/56F8002 is well-suited for many

applications. It includes many peripherals that are especially

useful for cost-sensitive applications, including:

• Industrial control

On-chip features include:

• Up to 32 MIPS at 32 MHz core frequency

• DSP and MCU functionality in a unified, C-efficient

architecture

• On-chip memory

– 56F8006: 16 KB (8K x 16) flash memory

– 56F8002: 12 KB (6K x 16) flash memory

– 2 KB (1K x 16) unified data/program RAM

• One 6-channel PWM module

• Home appliances

• Smart sensors

• Two 28-channel, 12-bit analog-to-digital converters

(ADCs)

• Fire and security systems

• Switched-mode power supply and power management

• Power metering

• Two programmable gain amplifiers (PGA) with gain up to

32x

• Three analog comparators

• Motor control (ACIM, BLDC, PMSM, SR, and stepper)

• Handheld power tools

• Arc detection

• One programmable interval timer (PIT)

• One high-speed serial communication interface (SCI) with

LIN slave functionality

• Medical device/equipment

• Instrumentation

• Lighting ballast

• One serial peripheral interface (SPI)

• One 16-bit dual timer (2 x 16 bit timers)

• One programmable delay block (PDB)

• One SMBus compatible inter-integrated circuit (I C) port

• One real time counter (RTC)

The 56800E core is based on a dual Harvard-style architecture

consisting of three execution units operating in parallel, allowing

as many as six operations per instruction cycle. The MCU-style

programming model and optimized instruction set allow

straightforward generation of efficient, compact DSP and control

code. The instruction set is also highly efficient for C compilers

to enable rapid development of optimized control applications.

The 56F8006/56F8002 supports program execution from internal

memories. Two data operands can be accessed from the on-chip

data RAM per instruction cycle. The 56F8006/56F8002 also

offers up to 40 general-purpose input/output (GPIO) lines,

depending on peripheral configuration.

• Computer operating properly (COP)/watchdog

• Two on-chip relaxation oscillators — 1 kHz and 8 MHz

(400 kHz at standby mode)

• Crystal oscillator

• Integrated power-on reset (POR) and low-voltage interrupt

(LVI) module

• JTAG/enhanced on-chip emulation (OnCE™) for

unobtrusive, real-time debugging

• Up to 40 GPIO lines

• 28-pin SOIC, 32-pin LQFP, 32-pin PSDIP, and 48-pin

LQFP packages

The 56F8006/56F8002 digital signal controller includes up to

16 KB of program flash and 2 KB of unified data/program

Freescale reserves the right to change the detail specifications as may be required to permit

improvements in the design of its products.

12 3 4 5 6 7...106

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PC56F8357VPY60	MOTOROLA	获取价格	Digital Signal Processor, 16-Ext Bit, 240MHz, CMOS, PQFP160, 24 X 24 MM, 0.50 MM PITCH, PL
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PC56UH10%EBE2	VISHAY	获取价格	暂无描述
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