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PALCE16V8L-25LMB PDF预览

PALCE16V8L-25LMB

更新时间: 2024-11-07 21:54:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 闪存
页数 文件大小 规格书
13页 300K
描述
Flash-Erasable Reprogrammable CMOS PAL Device

PALCE16V8L-25LMB 数据手册

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USE ULTRA37000™ FOR  
ALL NEW DESIGNS  
PALCE16V8  
Flash-Erasable Reprogrammable  
CMOS PAL® Device  
• Up to 16 input terms and eight outputs  
Features  
• 7.5 ns com’l version  
5 ns tCO  
5 ns tS  
• Active pull-up on data input pins  
• Low power version (16V8L)  
7.5 ns tPD  
125-MHz state machine  
— 55 mA max. commercial (10, 15, 25 ns)  
— 65 mA max. industrial (10, 15, 25 ns)  
— 65 mA military (15 and 25 ns)  
• 10 ns military/industrial versions  
7 ns tCO  
10 ns tS  
10 ns tPD  
62-MHz state machine  
• Standard version has low power  
— 90 mA max. commercial (10, 15, 25 ns)  
— 115 mA max. commercial (7 ns)  
— 130 mA max. military/industrial (10, 15, 25 ns)  
• High reliability  
— Proven Flash technology  
— 100% programming and functional testing  
• CMOS Flash technology for electrical erasability and  
reprogrammability  
Functional Description  
• PCI-compliant  
• User-programmable macrocell  
— Output polarity control  
The Cypress PALCE16V8 is a CMOS Flash Electrical  
Erasable second-generation programmable array logic  
device. It is implemented with the familiar sum-of-product  
(AND-OR) logic structure and the programmable macrocell.  
— Individually selectable for registered or combina-  
torial operation  
Logic Block Diagram (PDIP/CDIP)  
GND  
I
8
I
7
I
6
I
5
I
4
I
3
I
2
I
1
CLK/I  
0
10  
9
8
7
6
5
4
3
2
1
PROGRAMMABLE  
AND ARRAY  
(64 x 32)  
8
8
8
8
8
8
8
8
Macrocell  
Macrocell  
Macrocell  
Macrocell  
Macrocell  
Macrocell  
Macrocell  
Macrocell  
11  
12  
I/O  
13  
I/O  
14  
I/O  
15  
I/O  
16  
I/O  
17  
I/O  
18  
I/O  
19  
I/O  
20  
OE/I  
V
CC  
9
0
1
2
3
4
5
6
7
PLCC/LCC  
Top View  
Pin Configurations  
DIP  
Top View  
1
2
3
4
20  
19  
18  
CLK/I  
V
I/O  
I/O  
I/O  
5
0
CC  
I
1
7
3 2 1 2019  
I
2
6
I
18  
I/O  
6
4
5
6
7
8
17  
I
3
3
I
17  
I/O  
5
6
4
5
16 I/O  
I
I
5
4
4
I
I/O  
16  
15  
14  
5
4
I/O  
15 I/O  
3
I
6
3
I/O  
14  
13  
12  
11  
7
8
9
10  
I/O  
I
2
I
6
7
7
2
I/O  
I
9 10111213  
1
I
I/O  
8
0
GND  
OE/I  
9
Cypress Semiconductor Corporation  
Document #: 38-03025 Rev. *A  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Revised April 22, 2004  

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