PALC22V10D-15KMB

更新时间： 2024-11-10 03:53:51

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		闪存可编程逻辑输入元件时钟
页数	文件大小	规格书
12页	328K
描述
Flash Erasable, Reprogrammable CMOS PAL㈢ Device

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PALC22V10D-15KMB 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DFP	包装说明：	DFP, FL24,.4
针数：	24	Reach Compliance Code：	not_compliant
ECCN代码：	3A001.A.2.C	HTS代码：	8542.39.00.01
风险等级：	5.13	其他特性：	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
架构：	PAL-TYPE	最大时钟频率：	50 MHz
JESD-30 代码：	R-GDFP-F24	JESD-609代码：	e0
专用输入次数：	11	I/O 线路数量：	10
输入次数：	22	输出次数：	10
产品条款数：	132	端子数量：	24
最高工作温度：	125 °C	最低工作温度：	-55 °C
组织：	11 DEDICATED INPUTS, 10 I/O	输出函数：	MACROCELL
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DFP
封装等效代码：	FL24,.4	封装形状：	RECTANGULAR
封装形式：	FLATPACK	峰值回流温度（摄氏度）：	240
电源：	5 V	可编程逻辑类型：	FLASH PLD
传播延迟：	15 ns	认证状态：	Not Qualified
筛选级别：	38535Q/M;38534H;883B	子类别：	Programmable Logic Devices
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	FLAT
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	Base Number Matches：	1

PALC22V10D-15KMB 数据手册

1P AL C2 2V 1 0D

fax id: 6007

For new designs, please refer to the PALCE22V10.

PALC22V10D

Flash Erasable, Reprogrammable CMOS PAL® Device

vides the capability of defining the architecture of each output

individually. Each of the 10 potential outputs may be specified

Features

• Advanced second-generation PAL architecture

• Low power

as “registered” or “combinatorial.” Polarity of each output may

also be individually selected, allowing complete flexibility of

output configuration. Further configurability is provided

through “array” configurable “output enable” for each potential

output. This feature allows the 10 outputs to be reconfigured

as inputs on an individual basis, or alternately used as a com-

bination I/O controlled by the programmable array.

— 90 mA max. commercial (10 ns)

— 130 mA max. commercial (7.5 ns)

• CMOS Flash EPROM technology for electrical erasabil-

ity and reprogrammability

• Variable product terms

PALC22V10D features a variable product term architecture.

There are 5 pairs of product term sums beginning at 8 product

terms per output and incrementing by 2 to 16 product terms

per output. By providing this variable structure, the PAL C

22V10D is optimized to the configurations found in a majority

of applications without creating devices that burden the prod-

uct term structures with unusable product terms and lower per-

formance.

— 2 x(8 through 16) product terms

• User-programmable macrocell

— Output polarity control

— Individually selectable for registered or combinato-

rial operation

• Up to 22 input terms and 10 outputs

• DIP, LCC, and PLCC available

— 7.5 ns commercial version

Additional features of the Cypress PALC22V10D include a

synchronous preset and an asynchronous reset product term.

These product terms are common to all macrocells, eliminat-

ing the need to dedicate standard product terms for initializa-

tion functions. The device automatically resets upon pow-

er-up.

5 ns t

The PALC22V10D, featuring programmable macrocells and

variable product terms, provides a device with the flexibility to

implement logic functions in the 500- to 800-gate-array com-

plexity. Since each of the 10 output pins may be individually

configured as inputs on a temporary or permanent basis, func-

tions requiring up to 21 inputs and only a single output and

down to 12 inputs and 10 outputs are possible. The 10 poten-

tial outputs are enabled using product terms. Any output pin

may be permanently selected as an output or arbitrarily en-

abled as an output and an input through the selective use of

individual product terms associated with each output. Each of

these outputs is achieved through an individual programmable

macrocell. These macrocells are programmable to provide a

combinatorial or registered inverting or non-inverting output. In

a registered mode of operation, the output of the register is fed

back into the array, providing current status information to the

array. This information is available for establishing the next

result in applications such as control state machines. In a com-

binatorial configuration, the combinatorial output or, if the out-

put is disabled, the signal present on the I/O pin is made avail-

able to the array. The flexibility provided by both

programmable product term control of the outputs and variable

product terms allows a significant gain in functional density

through the use of programmable logic.

7.5 ns t

133-MHz state machine

— 10 ns military and industrial versions

6 ns t

10 ns t

110-MHz state machine

— 15-ns commercial and military

versions

— 25-ns commercial and military

versions

• High reliability

— Proven Flash EPROM technology

100% programming and functional testing

Functional Description

The Cypress PALC22V10D is a CMOS Flash Erasable sec-

ond-generation programmable array logic device. It is imple-

mented with the familiar sum-of-products (AND-OR) logic

structure and the programmable macrocell.

Along with this increase in functional density, the Cypress

PALC22V10D provides lower-power operation through the

use of CMOS technology, and increased testability with Flash

reprogrammability.

The PALC22V10D is executed in a 24-pin 300-mil molded DIP,

a 300-mil cerDIP, a 28-lead square ceramic leadless chip car-

rier, a 28-lead square plastic leaded chip carrier, and provides

up to 22 inputs and 10 outputs. The 22V10D can be electrically

erased and reprogrammed. The programmable macrocell pro-

PAL is a registered trademark of Advanced Micro Devices

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

July 1991 – Revised October 1995

•

408-943-2600

12 3 4 5 6 7...12

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与PALC22V10D-15KMB相关器件

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PALC22V10D-15LMB	CYPRESS	获取价格	Flash Erasable, Reprogrammable CMOS PAL㈢ Devi
PALC22V10D-15PC	CYPRESS	获取价格	Flash Erasable, Reprogrammable CMOS PAL㈢ Devi
PALC22V10D-15PI	CYPRESS	获取价格	Flash Erasable, Reprogrammable CMOS PAL㈢ Devi
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PALC22V10D-25JCR	CYPRESS	获取价格	Flash PLD, 25ns, CMOS, PQCC28, PLASTIC, LCC-28
PALC22V10D-25JCT	CYPRESS	获取价格	Flash PLD, 25ns, CMOS, PQCC28, PLASTIC, LCC-28
PALC22V10D-25JI	CYPRESS	获取价格	Flash Erasable, Reprogrammable CMOS PAL㈢ Devi
PALC22V10D-25JIT	CYPRESS	获取价格	Flash PLD, 25ns, CMOS, PQCC28, PLASTIC, LCC-28
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