Datasheet > PAL20V8

PAL20V8

更新时间： 2024-11-03 22:58:47

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		闪存
页数	文件大小	规格书
13页	289K
描述
Flash Erasable, Reprogrammable CMOS PAL Device

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数据手册

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PAL20V8 数据手册

1P AL CE 20 V8

fax id: 6010

PALCE20V8

Flash Erasable,

Reprogrammable CMOS PAL Device

• QSOP package available

Features

—10, 15, and 25 ns com’l version

• Active pull-up on data input pins

• Low power version (20V8L)

—15, and 25 ns military/industrial versions

• High reliability

— 55 mA max. commercial (15, 25 ns)

—Proven Flash technology

— 65 mA max. military/industrial

(15, 25 ns)

—100% programming and functional testing

• Standard version has low power

Functional Description

— 90 mA max. commercial

(15, 25 ns)

The Cypress PALCE20V8 is a CMOS Flash Erasable sec-

ond-generation programmable array logic device. It is imple-

mented with the familiar sum-of-product (AND-OR) logic struc-

ture and the programmable macrocell.

— 115 mA max. commercial (10 ns)

— 130 mA max. military/industrial (15, 25 ns)

• CMOS Flash technology for electrical erasability and

reprogrammability

• User-programmable macrocell

— Output polarity control

The PALCE20V8 is executed in a 24-pin 300-mil molded DIP,

a 300-mil cerdip, a 28-lead square ceramic leadless chip car-

rier, a 28-lead square plastic leaded chip carrier, and a 24-lead

quarter size outline. The device provides up to 20 inputs and

8 outputs. The PALCE20V8 can be electrically erased and re-

programmed. The programmable macrocell enables the de-

vice to function as a superset to the familiar 24-pin PLDs such

as 20L8, 20R8, 20R6, 20R4.

— Individually selectable for registered or combinato-

rial operation

Logic Block Diagram (PDIP/CDIP/QSOP)

GND

CLK/I

PROGRAMMABLE

AND ARRAY

(64 x 40)

MUX

Macrocell

MUX

OE/I

I/O

20V8–1

PAL is a registered trademark of Advanced Micro Devices, Inc.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

June 1994 – Revised March 26, 1997

12 3 4 5 6 7...13

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