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PACVGA203

更新时间： 2024-09-29 03:27:27
品牌 Logo 应用领域
CALMIRCO /
页数 文件大小 规格书
8页 170K
描述
VGA Port Companion Circuit

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PACVGA203 数据手册

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PACVGA203  
VGA Port Companion Circuit  
Product Description  
Features  
•
•
Single-chip solution for the VGA port interface  
Includes ESD protection, level shifting, and RGB  
termination  
Seven channels of ESD protection for all VGA port  
connector pins, meeting IEC-61000-4-2 Level-4  
ESD requirements (8kV contact discharge)  
Very low loading capacitance from ESD protection  
diodes on VIDEO lines; 4pF typical  
The PACVGA203 incorporates seven channels of ESD  
protection for all signal lines commonly found in a VGA  
port. ESD protection is implemented with current  
steering diodes designed to safely handle the high  
surge currents encountered with IEC-61000-4-2 Level-  
4 ESD Protection (8kV contact discharge). When a  
channel is subjected to an electrostatic discharge, the  
ESD current pulse is diverted via the protection diodes  
into either the positive supply rail or ground where it  
may be safely dissipated. Separate positive supply  
rails are provided for the VIDEO, DDC and SYNC  
channels to facilitate interfacing with low voltage Video  
Controller ICs and provide design flexibility in multi-  
supply-voltage environments.  
•
•
•
•
•
75Ω termination resistors for VIDEO lines  
(matched to 1% typ.)  
TTL to CMOS level-translating buffers with power-  
down mode for HSYNC and VSYNC lines  
Bi-directional level shifting N-channel FETs pro-  
vided for DDC_CLK & DDC_DATA channels  
Compact 24-pin QSOP package  
•
•
Two non-inverting drivers provide buffering for the  
HSYNC and VSYNC signals from the Video Controller  
IC (SYNC_IN1, SYNC_IN2). These buffers accept TTL  
input levels and convert them to CMOS output levels  
Lead-free version available  
Applications  
•
•
that swing between Ground and V 4 (cont’d next  
page).  
CC  
Notebook computers with VGA port  
Desktop PCs with VGA port  
Simplified Electrical Schematic  
V
2
1
V
2
CC  
CC  
V_BIAS  
13  
V
4
20  
CC  
SYNC_OUT1  
V
3
CC  
D1  
19  
R
12  
S
1
14  
R
C
GNDD  
3
4
5
23  
11  
VIDEO_1  
16  
15  
SYNC_IN1  
SD1  
DDC_IN1  
DDC_OUT1  
VIDEO_2  
VIDEO_3  
R
B
GNDD  
GNDD  
GNDD  
GNDD  
PWR_UP  
SYNC_OUT2  
SD2  
6
GNDD  
V
2
CC  
R
C
V
3
GNDD  
CC  
V
4
GNDD  
CC  
GNDD  
22  
S
R
75  
75  
75  
C
8
GNDD  
1
TERM_1  
TERM_2  
TERM_3  
GNDA  
R
9
17  
18  
DDC_IN2  
DDC_OUT2  
21  
24  
10  
7
SYNC_IN2  
GNDD  
GNDD  
GNDD  
GNDA  
GNDD  
© 2004 California Micro Devices Corp. All rights reserved.  
12/07/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112  
●
Tel: 408.263.3214  
●
Fax: 408.263.7846  
●
www.calmicro.com  
1
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