PACVGA200

更新时间： 2024-11-04 05:59:27

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
10页	125K
描述
VGA Port Companion Circuit

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中文翻译

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PACVGA200 数据手册

VGA Port Companion Circuit

PACVGA200

Two non-inverting drivers provide buffering for the

HSYNC and VSYNC signals from the Video

Controller IC (SYNC_IN1, SYNC_IN2). These buffers

accept TTL input levels and convert them to CMOS

output levels that swing between Ground and V_CC4 .

Features

•

Single chip solution for the VGA port interface

Includes ESD protection, level shifting, and RGB

termination

•

Seven channels of ESD protection for all VGA

port connector pins meeting IEC-61000-4-2

Level-4 ESD requirements ( 8kV contact

discharge)

These drivers have nominal 60 Ω output impedance

(R_S) to match the characteristic impedance of the

HSYNC & VSYNC lines of the video cables typically

used in PC applications. Two N-channel FETs

provide the level shifting function required when the

DDC controller is operated at a lower supply voltage

than the monitor. Three 75 Ω termination resistors

suitable for terminating the video signals from the

video DAC are also provided. These resistors have

separate input pins to allow insertion of additional

EMI filtering, if required, between the termination

point and the ESD protection diodes. These resistors

are matched to better than 2% for excellent signal

level matching for the R/G/B signals.

•

Very low loading capacitance from ESD

protection diodes on VIDEO lines, 4pF typical

75Ω termination resistors for VIDEO lines

(matched to 1% typ.)

TTL to CMOS level-translating buffers with power

down mode for HSYNC and VSYNC lines

Bi-directional level shifting N-channel FETs

provided for DDC_CLK & DDC_DATA channels

Compact 24-pin QSOP package

•

Lead-free version available

Applications

•

Notebook computers with VGA port

Desktop PCs with VGA port

When the PWR_UP input is driven LOW, the SYNC

inputs can be floated without causing the SYNC

buffers to draw any current from the V_CC4 supply.

When the PWR_UP input is LOW, the SYNC outputs

are driven LOW.

Product Description

The PACVGA200 incorporates seven channels of

ESD protection for all signal lines commonly found in

a VGA port. ESD protection is implemented with

current steering diodes designed to safely handle the

high surge currents encountered with IEC-61000-4-2

Level-4 ESD Protection ( 8kV contact discharge).

When a channel is subjected to an electrostatic

discharge, the ESD current pulse is diverted via the

protection diodes into either the positive supply rail or

ground where it may be safely dissipated. Separate

positive supply rails are provided for the VIDEO, DDC

and SYNC channels to facilitate interfacing with low

voltage Video Controller ICs and provide design

flexibility in multi-supply-voltage environments.

An internal diode (D1 in schematic on previous page)

is also provided so that V_CC3 can be derived from

V_CC4, if desired, by connecting V_CC3 to V_BIAS. In

applications where V_CC4 may be powered down,

diode D1 blocks any DC current paths from the

DDC_OUT pins back to the powered down V_CC4 rail

via the top ESD protection diodes.

The PACVGA200 device is housed in a 24-pin QSOP

package and is available with optional lead-free

finishing.

May 2010 Rev. 2

Publication Order Number:

PACVGA200/D

12 3 4 5 6 7...10

中文翻译

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与PACVGA200相关器件

型号	品牌	获取价格	描述	数据表
PACVGA200Q	CALMIRCO	获取价格	VGA PORT COMPANION CIRCUIT
PACVGA200QR	ONSEMI	获取价格	VGA Port Companion Circuit
PACVGA201	ONSEMI	获取价格	VGA Port Companion Circuit
PACVGA201	CALMIRCO	获取价格	VGA PORT COMPANION CIRCUIT
PACVGA201Q	CALMIRCO	获取价格	VGA PORT COMPANION CIRCUIT
PACVGA201QR	ONSEMI	获取价格	VGA Port Companion Circuit
PACVGA203	CALMIRCO	获取价格	VGA Port Companion Circuit
PACVGA203Q	CALMIRCO	获取价格	VGA Port Companion Circuit
PACVGA203QR	CALMIRCO	获取价格	VGA Port Companion Circuit
PACZIG1284	CALMIRCO	获取价格	IEEE 1284 Parallel Port ESD/EMI/Eermination network

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