VGA Port Companion Circuit
PACVGA105
Features
Product Description
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Seven channels of ESD protection designed to
meet IEC-1000-4-2 Level-4 ESD requirements
( 8kV contact discharge)
Very low loading capacitance from ESD
protection diodes at less than 5pF typical
TTL to CMOS level-translating buffers for the
HSYNC and VSYNC lines
The PACVGA105 incorporates 7 channels of ESD
protection for signal lines commonly found in a VGA
port for PCs. ESD protection is implemented with
current steering diodes designed to safely handle the
high peak surge currents associated with the IEC-
1000-4-2 Level-4 ESD Protection Standard ( 8kV
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Three independent supply pins (VCC, VRGB and
contact discharge). When the channels are subjected
to an electrostatic discharge, the ESD current pulse
is diverted via the protection diodes into the positive
supply rails or ground where they may be safely
dissipated.
VAUX) to facilitate operation with sub-micron
Graphics Controller ICs
High impedance pull-ups (50kΩ nominal to VAUX
for HSYNC and VSYNC inputs
Pull-up resistors (1.8kΩ nominal to VCC) for
DDC_CLK and DDC_DATA lines
Compact 16-pin QSOP package
Lead-free version available
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The upper ESD diodes for the R, G and B channels
are connected to a separate supply rail (VRGB) to
facilitate interfacing to graphics controller ICs with low
voltage supplies. The remaining channels are
connected to the main 5V rail (VCC). The lower diodes
for the R, G and B channels are also connected to a
dedicated ground pin (GNDA) to minimize crosstalk
due to common ground impedance.
Applications
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ESD protection and termination resistors for VGA
(video) port interfaces
Desktop PCs
Notebook computers
LCD monitors
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Two non-inverting buffers are also included in this IC
for buffering the HSYNC and VSYNC signals from
the graphics controller IC. These buffers will accept
TTL input levels and convert them to CMOS output
levels that swing between GND and VCC. These
drivers have a nominal 60Ω output impedance to
match the characteristic impedance of the HSYNC
and VSYNC lines of the video cables typically used.
The inputs of these drivers also have high impedance
pull-ups (50kW nom.) pulling up to the VAUX rail. In
addition, the DDC_CLOCK and DDC_DATA
channels have 1.8kΩ resistors pulling these inputs
up to the main 5V (VCC) rail.
©2010 SCILLC. All rights reserved.
May 2010 Rev. 2
Publication Order Number:
PACVGA105/D