Datasheet > PA7140JI-25

PA7140JI-25

更新时间： 2024-01-16 23:09:54

品牌	Logo	应用领域
ICT		时钟栅输入元件可编程逻辑
页数	文件大小	规格书
6页	412K
描述
EE PLD, 25ns, CMOS, PQCC44, TQFP-44

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PA7140JI-25 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	QCCJ, LDCC44,.7SQ
针数：	44	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.89
其他特性：	24 MACROCELLS; 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK	最大时钟频率：	62.5 MHz
JESD-30 代码：	S-PQCC-J44	JESD-609代码：	e0
长度：	16.5862 mm	专用输入次数：	12
I/O 线路数量：	24	输入次数：	38
输出次数：	24	端子数量：	44
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	12 DEDICATED INPUTS, 24 I/O	输出函数：	COMBINATORIAL
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装等效代码：	LDCC44,.7SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	电源：	5 V
可编程逻辑类型：	EE PLD	传播延迟：	25 ns
认证状态：	Not Qualified	子类别：	Field Programmable Gate Arrays
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
宽度：	16.5862 mm	Base Number Matches：	1

PA7140JI-25 数据手册

Commercial/

Industrial

PA7140 PEEL Array

Programmable Electrically Erasable Logic Array

Features

■

Versatile Logic Array Architecture

- 24 I/Os, 14 inputs, 60 registers/latches

■

CMOS Electrically Erasable Technology

- Reprogrammable in 40-pin DIP,

- Up to 72 logic cell output functions

44-pin PLCC, and TQFP packages

- PLA structure with true product-term sharing

- Logic functions and registers can be I/O-buried

■

Flexible Logic Cell

- Up to 3 output functions per logic cell

- D,T and JK registers with special features

- Independent or global clocks, resets, presets,

clock polarity and output enables

■

High-Speed Commercial and Industrial Versions

- As fast as 13ns/20ns (tpdi/tpdx), 66.6MHz (fMAX)

- Industrial grade available for 4.5 to 5.5V Vcc and -40

to +85 °C temperatures Ideal for Combinatorial,

Synchronous and Asynchronous Logic Applications

- Integration of multiple PLDs and random logic

- Buried counters, complex state-machines

- Sum-of-products logic for output enables

■

Development and Programmer Support

- ICT PLACE Development Software

-Fitters for ABEL, CUPL and other software

-Programming support for by ICT PDS-3 and popular

third-party programmers

- Comparators, decoders, other wide-gate functions

General Description

The PA7140 is a member of the Programmable Electrically

Erasable Logic (PEEL™) Array family based on ICT’s

CMOS EEPROM technology. PEEL™ Arrays free design-

ers from the limitations of ordinary PLDs by providing the

architectural flexibility and speed needed for today’s pro-

grammable logic designs. The PA7140 offers a versatile

logic array architecture with 24 I/O pins, 14 input pins and

60 registers/latches (24 buried logic cells, 12 input regis-

ters/latches, 24 buried I/O registers/latches). Its logic array

implements 100 sum-of-products logic functions divided

into two groups each serving 12 logic cells. Each group

shares half (60) of the 120 product-terms available for logic

cells.

The PA7140’s logic and I/O cells (LCCs, IOCs) are

extremely flexible with up to three output functions per cell

(a total of 72 for all 24 logic cells). Cells are configurable as

D, T, and JK registers with independent or global clocks,

resets, presets, clock polarity, and other features, making

the PA7140 suitable for a variety of combinatorial, synchro-

nous and asynchronous logic applications. The PA7140

supports speeds as fast as 13ns/20ns (tpdi/tpdx) and

66.6MHz (fMAX) at moderate power consumption 140mA

(100mA typical). Packaging includes 40-pin DIP and 44-pin

PLCC (see Figure 1). Development and programming sup-

port for the PA7140 is provided by ICT and popular third-

party development tool manufacturers.

Figure 1: Pin Configuration

Figure 2. Block Diagram

TQFP

44 43 42 41 40 39 38 37 36 35 34

Pin 1

12 13 14 15 16 17 18 19 20 21 22

1 of 6

12 3 4 5 6

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与PA7140JI-25相关器件

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PA7140JN-20	ETC	Field Programmable Gate Array (FPGA)	获取价格
PA7140JN-25	ETC	Field Programmable Gate Array (FPGA)	获取价格
PA7140JNI-25	ETC	Field Programmable Gate Array (FPGA)	获取价格
PA7140P-20	ETC	Field Programmable Gate Array (FPGA)	获取价格
PA7140P-25	ETC	Field Programmable Gate Array (FPGA)	获取价格
PA7140PI-25	ETC	Field Programmable Gate Array (FPGA)	获取价格

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