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PA28F200BX-T120 PDF预览

PA28F200BX-T120

更新时间: 2024-01-03 07:15:10
品牌 Logo 应用领域
英特尔 - INTEL 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
48页 563K
描述
2-MBIT (128K x 16, 256K x 8) BOOT BLOCK FLASH MEMORY FAMILY

PA28F200BX-T120 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:1.110 X 0.525 INCH, PLASTIC, SOP-44针数:44
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.76
Is Samacsys:N最长访问时间:120 ns
其他特性:BOTTOM BOOT BLOCK备用内存宽度:8
启动块:TOP命令用户界面:YES
数据轮询:NOJESD-30 代码:R-PDSO-N44
长度:28.2 mm内存密度:2097152 bit
内存集成电路类型:FLASH内存宽度:16
功能数量:1部门数/规模:1,2,1,1
端子数量:44字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SON
封装等效代码:SOP44,.63封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
电源:5 V编程电压:12 V
认证状态:Not Qualified座面最大高度:2.95 mm
部门规模:16K,8K,96K,128K最大待机电流:0.0000012 A
子类别:Flash Memories最大压摆率:0.065 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:MOS温度等级:COMMERCIAL
端子形式:NO LEAD端子节距:1.27 mm
端子位置:DUAL切换位:NO
类型:NOR TYPE宽度:13.3 mm
Base Number Matches:1

PA28F200BX-T120 数据手册

 浏览型号PA28F200BX-T120的Datasheet PDF文件第2页浏览型号PA28F200BX-T120的Datasheet PDF文件第3页浏览型号PA28F200BX-T120的Datasheet PDF文件第4页浏览型号PA28F200BX-T120的Datasheet PDF文件第5页浏览型号PA28F200BX-T120的Datasheet PDF文件第6页浏览型号PA28F200BX-T120的Datasheet PDF文件第7页 
2-MBIT (128K x 16, 256K x 8)  
BOOT BLOCK  
FLASH MEMORY FAMILY  
28F200BX-T/B, 28F002BX-T/B  
Y
Y
Y
x8/x16 Input/Output Architecture  
Ð 28F200BX-T, 28F200BX-B  
Ð For High Performance and High  
Integration 16-bit and 32-bit CPUs  
Hardware Data Protection Feature  
Ð Erase/Write Lockout during Power  
Transitions  
Y
Very High-Performance Read  
Ð 60/80/120 ns Maximum Access Time  
Ð 30/40/40 ns Maximum Output Enable  
Time  
x8-only Input/Output Architecture  
Ð 28F002BX-T 28F002BX-B  
Ð For Space Constrained 8-bit  
Applications  
Y
Y
Low Power Consumption  
Ð 20 mA Typical Active Read Current  
Y
Y
Upgradeable to Intel’s SmartVoltage  
Products  
Reset/Deep Power-Down Input  
Optimized High-Density Blocked  
Architecture  
Ð 0.2 mA I  
Typical  
Ð Acts as Reset for Boot Operations  
CC  
Ð One 16-KB Protected Boot Block  
Ð Two 8-KB Parameter Blocks  
Ð One 96-KB Main Block  
Ð One 128 KB Main Block  
Ð Top or Bottom Boot Locations  
Y
Extended Temperature Operation  
a
40 C to 85 C  
b
Ð
§
§
Write Protection for Boot Block  
Y
Y
Industry Standard Surface Mount  
Packaging  
Ð 28F200BX: JEDEC ROM Compatible  
44-Lead PSOP  
56-Lead TSOP  
Y
Y
Extended Cycling Capability  
Ð 100,000 Block Erase Cycles  
Automated Word/Byte Write and  
Block Erase  
Ð Command User Interface  
Ð Status Registers  
Ð Erase Suspend Capability  
Ð 28F002BX: 40-Lead TSOP  
Y
12V Word/Byte Write and Block Erase  
e
e
g
12V 5% Standard  
g
12V 10% Option  
Ð V  
Ð V  
PP  
PP  
Y
Y
SRAM-Compatible Write Interface  
Automatic Power Savings Feature  
ETOXTM III Flash Technology  
Ð 5V Read  
Y
Y
Ð 1 mA Typical I  
CC  
Static Operation  
Active Current in  
Independent Software Vendor Support  
*Other brands and names are the property of their respective owners.  
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or  
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make  
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.  
©
COPYRIGHT INTEL CORPORATION, 1995  
November 1995  
Order Number: 290448-005  

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