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P89V664 PDF预览

P89V664

更新时间: 2024-02-10 07:06:17
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器
页数 文件大小 规格书
89页 393K
描述
8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI

P89V664 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LPCC包装说明:PLASTIC, MS-018, SOT187-2, LCC-44
针数:44Reach Compliance Code:unknown
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.79Is Samacsys:N
具有ADC:NO地址总线宽度:16
位大小:8CPU系列:8051
最大时钟频率:40 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:S-PQCC-J44长度:16.585 mm
湿度敏感等级:3I/O 线路数量:36
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC44,.7SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
电源:5 V认证状态:Not Qualified
RAM(字节):2048ROM(单词):65536
ROM可编程性:FLASH座面最大高度:4.57 mm
速度:40 MHz子类别:Microcontrollers
最大压摆率:50 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:16.585 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

P89V664 数据手册

 浏览型号P89V664的Datasheet PDF文件第2页浏览型号P89V664的Datasheet PDF文件第3页浏览型号P89V664的Datasheet PDF文件第4页浏览型号P89V664的Datasheet PDF文件第5页浏览型号P89V664的Datasheet PDF文件第6页浏览型号P89V664的Datasheet PDF文件第7页 
P89V660/662/664  
8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash  
microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI  
Rev. 01 — 2 May 2007  
Product data sheet  
1. General description  
The P89V660/662/664 are 80C51 microcontrollers with 16 kB/32 kB/64 kB flash and  
512 B/1 kB/2 kB of data RAM. These devices are designed to be drop-in and software  
compatible replacements for the P89V660/662/664 devices. Both the In-System  
Programming (ISP) and In-Application Programming (IAP) boot codes are upward  
compatible.  
Additional features of the P89V660/662/664 devices when compared to the  
P89V660/662/664 devices are the inclusion of a secondary 100 kHz byte-wide I2C-bus  
interface, an SPI interface, four addition I/O pins (Port 4), and the ability to erase code  
memory in 128-byte pages.  
The IAP capability combined with the 128-byte page size allows for efficient use of the  
code memory for non-volatile data storage.  
2. Features  
2.1 Principal features  
I Dual 100 kHz byte-wide I2C-bus interfaces  
I 128-byte page erase for efficient use of code memory as non-volatile data storage  
I 0 MHz to 40 MHz operating frequency in 12x mode, 20 MHz in 6x mode  
I 16 kB/32 kB/64 kB of on-chip flash user code memory with ISP and IAP  
I 512 B/1 kB/2 kB RAM  
I SPI (Serial Peripheral Interface) and enhanced UART  
I PCA (Programmable Counter Array) with PWM and Capture/Compare functions  
I Three 16-bit timers/counters  
I Four 8-bit I/O ports, one 4-bit I/O port  
I WatchDog Timer (WDT)  
2.2 Additional features  
I 30 ms page erase, 150 ms block erase  
I Support for 12-clock (default) or 6-clock mode selection via ISP or parallel programmer  
I PLCC44 and TQFP44 packages  
I Ten interrupt sources with four priority levels  
I Second DPTR register  
I Low EMI mode (ALE inhibit)  
I Power-down mode with external interrupt wake-up  

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