P89LPC9351FDH

更新时间： 2024-10-27 05:59:27

品牌	Logo	应用领域
恩智浦 - NXP		闪存微控制器时钟
页数	文件大小	规格书
74页	343K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

P89LPC9351FDH 数据手册

P89LPC9351

8-bit microcontroller with accelerated two-clock 80C51 core

8 kB 3 V byte-erasable ﬂash with 8-bit ADC

Rev. 01 — 19 November 2008

Preliminary data sheet

1. General description

The P89LPC9351 is a single-chip microcontroller, available in low cost packages, based

on a high performance processor architecture that executes instructions in two to four

clocks, six times the rate of standard 80C51 devices. Many system-level functions have

been incorporated into the P89LPC9351 in order to reduce component count, board

space, and system cost.

2. Features

2.1 Principal features

I 8 kB byte-erasable ﬂash code memory organized into 1 kB sectors and 64-byte pages.

Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

I 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.

I 512-byte customer data EEPROM on-chip allows serialization of devices, storage of

setup parameters, etc.

I Dual 4-input multiplexed 8-bit ADC/DAC outputs. Two analog comparators with

selectable inputs and reference source.

I Dual Programmable Gain Ampliﬁers (PGA) with selectable gains of 2x, 4x, 8x, or 16x

can be applied to ADCs and analog comparator inputs.

I On-chip temperature sensor integrated with ADC module.

I Two 16-bit counter/timers (each may be conﬁgured to toggle a port output upon timer

overﬂow or to become a PWM output).

I A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit

prescaler and a programmable and readable 16-bit timer.

I Enhanced UART with a fractional baud rate generator, break detect, framing error

detection, and automatic address detection; 400 kHz byte-wide I²C-bus

communication port and SPI communication port.

I Capture/Compare Unit (CCU) provides PWM, input capture, and output compare

functions.

I 2.4 V to 3.6 V V_DDoperating range. I/O pins are 5 V tolerant (may be pulled up or

driven to 5.5 V).

I 4-level low voltage (brownout) detect allows a graceful system shutdown when power

fails.

I 28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins

while using on-chip oscillator and reset options.

12 3 4 5 6 7...74

中文翻译

下载PDF

与P89LPC9351FDH相关器件

型号	品牌	获取价格	描述	数据表
P89LPC9351FDH,518	NXP	获取价格	P89LPC9331/9341/9351/9361 - 8-bit microcontroller with accelerated two-clock 80C51 core, 4
P89LPC935FA	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC935FA-S	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC935FDH	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC935FDH,529	NXP	获取价格	P89LPC933/934/935/936 - 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8
P89LPC935FDH-S	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC935FHN	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC935FHN-S	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC936	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasa
P89LPC9361FDH	NXP	获取价格	8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/16 kB 3 V byte-eras

与P89LPC9351FDH相关文章

三星深化印度制造布局，供应链本地化进程加速
2024-10-29

10
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

8
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
2024-10-18

35
意法半导体发布第四代SiC技术，助力电动汽车电驱
2024-10-15

44

产品中心

服务支持

精选活动

关于我们

帮助中心

P89LPC9351FDH

P89LPC9351FDH 数据手册

与P89LPC9351FDH相关器件

与P89LPC9351FDH相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

P89LPC9351FDH

P89LPC9351FDH 数据手册

与P89LPC9351FDH相关器件

与P89LPC9351FDH相关文章

您还可以找

您在本页遇到什么问题？