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P89LPC9351

更新时间: 2024-10-27 05:59:27
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器时钟
页数 文件大小 规格书
74页 343K
描述
8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

P89LPC9351 数据手册

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P89LPC9351  
8-bit microcontroller with accelerated two-clock 80C51 core  
8 kB 3 V byte-erasable flash with 8-bit ADC  
Rev. 01 — 19 November 2008  
Preliminary data sheet  
1. General description  
The P89LPC9351 is a single-chip microcontroller, available in low cost packages, based  
on a high performance processor architecture that executes instructions in two to four  
clocks, six times the rate of standard 80C51 devices. Many system-level functions have  
been incorporated into the P89LPC9351 in order to reduce component count, board  
space, and system cost.  
2. Features  
2.1 Principal features  
I 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.  
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.  
I 256-byte RAM data memory and a 512-byte auxiliary on-chip RAM.  
I 512-byte customer data EEPROM on-chip allows serialization of devices, storage of  
setup parameters, etc.  
I Dual 4-input multiplexed 8-bit ADC/DAC outputs. Two analog comparators with  
selectable inputs and reference source.  
I Dual Programmable Gain Amplifiers (PGA) with selectable gains of 2x, 4x, 8x, or 16x  
can be applied to ADCs and analog comparator inputs.  
I On-chip temperature sensor integrated with ADC module.  
I Two 16-bit counter/timers (each may be configured to toggle a port output upon timer  
overflow or to become a PWM output).  
I A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit  
prescaler and a programmable and readable 16-bit timer.  
I Enhanced UART with a fractional baud rate generator, break detect, framing error  
detection, and automatic address detection; 400 kHz byte-wide I2C-bus  
communication port and SPI communication port.  
I Capture/Compare Unit (CCU) provides PWM, input capture, and output compare  
functions.  
I 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or  
driven to 5.5 V).  
I 4-level low voltage (brownout) detect allows a graceful system shutdown when power  
fails.  
I 28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins  
while using on-chip oscillator and reset options.  

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