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P56C3Q991-5J PDF预览

P56C3Q991-5J

更新时间: 2024-09-24 23:25:39
品牌 Logo 应用领域
其他 - ETC 时钟驱动器
页数 文件大小 规格书
10页 546K
描述
Eight Distributed-Output Clock Driver

P56C3Q991-5J 数据手册

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PI6C3Q991, PI6C3Q993  
3.3V Programmable Skew PLL Clock Driver  
SuperClock  
Features  
Description  
• PI6C3Q99X family provides following products:  
PI6C3Q991:32-pinPLCCversion  
PI6C3Q993:28-pinQSOPversion  
• Inputs are 5V I/O Tolerant  
• 4 pairs of programmable skew outputs  
• Low skew: 200ps same pair; 250ps all outputs  
• Selectable positive or negative edge synchronization:  
Excellent for DSP applications  
ThePI6C3Q99Xfamilyisahighfanout3.3VPLL-basedclockdriver  
intended for high performance computing and data-communica-  
tions applications. A key feature of the programmable skew is the  
abilityofoutputstoleadorlagtheREFinputsignal.ThePI6C3Q991  
has 8 programmable skew outputs in 4 banks of 2, while the  
PI6C3Q993 has 6 programmable skew outputs and 2 zero skew  
outputs.Skewiscontrolledby3-levelinputsignalsthatmaybehard-  
wiredtoappropriateHIGH-MID-LOWlevels.  
• Synchronous output enable  
• Output frequency: 3.75 MHz to 85 MHz  
• 2x, 4x, 1/2, and 1/4 outputs  
• 3 skew grades:  
• 3-level inputs for skew and PLL range control  
• PLL bypass for DC testing  
When the GND/sOE pin is held low, all the outputs are synchro-  
nously enabled. However, if GND/sOE is held high, all the outputs  
except3Q0and3Q1aresynchronouslydisabled.Furthermore,when  
the V  
/PE is held high, all the outputs are synchronized with the  
CCQ  
positive edge of the REF clock input. When V  
/PE is held low,  
CCQ  
alltheoutputsaresynchronizedwiththenegativeedgeof REF.Both  
devices have LVTTL outputs with 12mA balanced drive outputs.  
• Externalfeedback,internalloopfilter  
• 12mA balanced drive outputs  
• LowJitter:<200pspeak-to-peak  
• Industrial temperature range  
• Pin-to-pincompatiblewithIDTQS5V991andQS5V993  
• Availablein32-pinPLCCand28-pinQSOP  
PinConfigurations  
PI6C3Q991  
PI6C3Q993  
1
REF  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
GND  
TEST  
2F1  
2
V
CCQ  
FS  
3
4
3
2
1 32 31 30  
29  
4
3F0  
3F1  
/PE  
2F0  
3F1  
4F0  
4F1  
/PE  
5
6
7
8
9
2F0  
GND/sOE  
1F1  
5
GND/sOE  
1F1  
28  
27  
26  
25  
24  
23  
22  
21  
6
V
CCQ  
V
28-Pin  
Q
7
1F0  
V
CCN  
1F0  
CCQ  
V
32-Pin  
8
4Q1  
4Q0  
GND  
3Q1  
3Q0  
V
CCN  
V
CCN  
4Q1  
4Q0  
GND  
GND  
J
CCN  
9
1Q0  
1Q1  
GND  
GND  
2Q0  
2Q1  
10  
11  
12  
13  
1Q0  
1Q1  
GND  
GND  
10  
11  
12  
13  
14  
V
14 15 16 17 18 19 20  
CCN  
FB  
PS8449A  
10/09/00  
1

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