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P4C164-70JMBLF

更新时间： 2024-11-12 05:20:43

品牌	Logo	应用领域
PYRAMID		/
页数	文件大小	规格书
16页	182K
描述
ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS

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中文翻译

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数据手册

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P4C164-70JMBLF 数据手册

P4C164

ULTRA HIGH SPEED 8K x 8

STATIC CMOS RAMS

FEATURES

Common Data I/O

Full CMOS, 6T Cell

Fully TTL Compatible Inputs and Outputs

High Speed (Equal Access and Cycle Times)

– 8/10/12/15/20/25/35/70/100 ns (Commercial)

– 10/12/15/20/25/35/70/100 ns(Industrial)

–12/15/20/25/35/45/70/100ns(Military)

StandardPinout(JEDECApproved)

– 28-Pin 300 mil Plastic DIP, SOJ

– 28-Pin 600 mil Plastic DIP (70 & 100ns)

– 28-Pin 300 mil SOP (70 & 100ns)

– 28-Pin 300 mil Ceramic DIP

– 28-Pin 600 mil Ceramic DIP

– 28-Pin 350 x 550 mil LCC

Low Power Operation

Output Enable and Dual Chip Enable Control

Functions

– 32-Pin 450 x 550 mil LCC

–28-PinCERPACK

Single 5V±10% Power Supply

Data Retention with 2.0V Supply, 10 µA Typical

Current(P4C164LMilitary)

DESCRIPTION

Access times as fast as 8 nanoseconds are available,

permitting greatly enhanced system operating speeds.

The P4C164 is a 65,536-bit ultra high-speed static RAM

organized as 8K x 8. The CMOS memory requires no

clocks or refreshing and has equal access and cycle

times.InputsarefullyTTL-compatible. TheRAMoperates

from a single 5V±10% tolerance power supply. With

battery backup, data integrity is maintained with supply

voltages down to 2.0V. Current drain is typically 10 µA

from a 2.0V supply.

TheP4C164isavailablein28-pin300milDIPandSOJ,28-

pin 600 mil plastic and ceramic DIP, 28-pin 350 x 550 mil

LCC, 32-pin 450 x 550 mil LCC, and 28-pin CERPACK.

The70nsand100nsP4C164sareavailableinthe600mil

plastic DIP.

PIN CONFIGURATIONS

FUNCTIONAL BLOCK DIAGRAM

DIP (P5, P6, C5, C5-1, D5-1, D5-2),

SOJ (J5), CERPACK (F4), SOP(S6)

1519B

SEE PAGE 7 FOR LCC PIN CONFIGURATIONS

Document # SRAM115 REV F

Revised June 2007

12 3 4 5 6 7...16

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