Datasheet > P4C164-70FSILF

P4C164-70FSILF

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
PYRAMID		静态存储器
页数	文件大小	规格书
16页	1239K
描述
Standard SRAM

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数据手册

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P4C164-70FSILF 数据手册

P4C164

ULTRA HIGH SPEED 8K X 8

STATIC CMOS RAMS

FEATURES

Full CMOS, 6T Cell

Common Data I/O

High Speed (Equal Access and Cycle Times)

– 8/10/12/15/20/25/35/70/100 ns (Commercial)

– 10/12/15/20/25/35/70/100 ns(Industrial)

– 12/15/20/25/35/45/70/100 ns (Military)

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 28-Pin 300 mil Plastic DIP, SOJ

– 28-Pin 600 mil Plastic DIP

Low Power Operation

– 28-Pin 300 mil SOP (70 & 100ns)

– 28-Pin 300 mil Ceramic DIP

– 28-Pin 600 mil Ceramic DIP

– 28-Pin 350 x 550 mil LCC

Output Enable and Dual Chip Enable Control

Functions

– 32-Pin 450 x 550 mil LCC

– 28-Pin Glass-sealed CERPACK

– 28-Pin Solder-sealed CERPACK

Single 5V±10% Power Supply

Data Retention with 2.0V Supply, 10 µA Typical

Current (P4C164L Only)

DESCRIPTIOꢀ

The P4C164 is a 65,536-bit ultra high-speed static RAM

organized as 8K x 8. The CMOS memory requires no

clocksorrefreshingandhasequalaccessandcycletimes.

Inputs are fully TTL-compatible. The RAM operates from

a single 5V±10% tolerance power supply. With battery

backup (P4C164L Only), data integrity is maintained with

supply voltages down to 2.0V. Current drain is typically 10

µA from a 2.0V supply.

Access times as fast as 8 nanoseconds are available,

permitting greatly enhanced system operating speeds.

The P4C164 is available in 28-pin 300 mil DIP and SOJ,

28-pin600milplasticandceramicDIP,28-pin350x550mil

LCC, 32-pin 450 x 550 mil LCC, and 28-pin glass-sealed

CERPACK and solder-sealed ﬂatpack.

FUꢀCTIOꢀAL BLOCK DIAGRAM

PIꢀ COꢀFIGURATIOꢀS

DIP (P5, P6, C5, C5-1, D5-1, D5-2),

SOJ (J5), CERPACK (F4), SOLDER-SEAL FLATPACK (FS-5), SOP (S6)

SEE PAGE 8 FOR LCC PIN CONFIGURATIONS

Document # SRAM115 REV H

Revised April 2011

12 3 4 5 6 7...16

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