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P4C164-35L32MBLF PDF预览

P4C164-35L32MBLF

更新时间: 2024-11-25 05:20:43
品牌 Logo 应用领域
PYRAMID /
页数 文件大小 规格书
16页 182K
描述
ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS

P4C164-35L32MBLF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFJ
包装说明:QCCN, LCC32,.45X.55针数:32
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.01
最长访问时间:35 nsI/O 类型:COMMON
JESD-30 代码:R-CQCC-N32长度:13.97 mm
内存密度:65536 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:32字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8输出特性:3-STATE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC32,.45X.55封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified筛选级别:MIL-STD-883
座面最大高度:1.905 mm最大待机电流:0.025 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.15 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.43 mm
Base Number Matches:1

P4C164-35L32MBLF 数据手册

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P4C164  
ULTRA HIGH SPEED 8K x 8  
STATIC CMOS RAMS  
FEATURES  
Common Data I/O  
Full CMOS, 6T Cell  
Fully TTL Compatible Inputs and Outputs  
High Speed (Equal Access and Cycle Times)  
– 8/10/12/15/20/25/35/70/100 ns (Commercial)  
– 10/12/15/20/25/35/70/100 ns(Industrial)  
12/15/20/25/35/45/70/100ns(Military)  
StandardPinout(JEDECApproved)  
– 28-Pin 300 mil Plastic DIP, SOJ  
– 28-Pin 600 mil Plastic DIP (70 & 100ns)  
– 28-Pin 300 mil SOP (70 & 100ns)  
– 28-Pin 300 mil Ceramic DIP  
– 28-Pin 600 mil Ceramic DIP  
– 28-Pin 350 x 550 mil LCC  
Low Power Operation  
Output Enable and Dual Chip Enable Control  
Functions  
– 32-Pin 450 x 550 mil LCC  
28-PinCERPACK  
Single 5V±10% Power Supply  
Data Retention with 2.0V Supply, 10 µA Typical  
Current(P4C164LMilitary)  
DESCRIPTION  
Access times as fast as 8 nanoseconds are available,  
permitting greatly enhanced system operating speeds.  
The P4C164 is a 65,536-bit ultra high-speed static RAM  
organized as 8K x 8. The CMOS memory requires no  
clocks or refreshing and has equal access and cycle  
times.InputsarefullyTTL-compatible. TheRAMoperates  
from a single 5V±10% tolerance power supply. With  
battery backup, data integrity is maintained with supply  
voltages down to 2.0V. Current drain is typically 10 µA  
from a 2.0V supply.  
TheP4C164isavailablein28-pin300milDIPandSOJ,28-  
pin 600 mil plastic and ceramic DIP, 28-pin 350 x 550 mil  
LCC, 32-pin 450 x 550 mil LCC, and 28-pin CERPACK.  
The70nsand100nsP4C164sareavailableinthe600mil  
plastic DIP.  
PIN CONFIGURATIONS  
FUNCTIONAL BLOCK DIAGRAM  
DIP (P5, P6, C5, C5-1, D5-1, D5-2),  
SOJ (J5), CERPACK (F4), SOP(S6)  
SEE PAGE 7 FOR LCC PIN CONFIGURATIONS  
Document # SRAM115 REV F  
Revised June 2007  
1

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