Datasheet > P4532VG

P4532VG

更新时间： 2024-09-24 05:58:55

品牌	Logo	应用领域
其他 - ETC		晶体晶体管场效应晶体管
页数	文件大小	规格书
8页	606K
描述
N- & P-Channel Enhancement Mode Field Effect Transistor(Preliminary)

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中文翻译

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P4532VG 数据手册

P4532VG

SOP-8

NIKO-SEM

N- & P-Channel Enhancement Mode

Field Effect Transistor(Preliminary)

Lead-Free

PRODUCT SUMMARY

V_(BR)DSSR_DS(ON)

I_D

G : GATE

60mΩ

45mΩ

N-Channel

P-Channel

-5A

D : DRAIN

S : SOURCE

-30

ABSOLUTE MAXIMUM RATINGS (T_C= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

N-Channel P-Channel UNITS

Drain-Source Voltage

V_DS

±20

-30

±20

-5

Gate-Source Voltage

V_GS

T_C= 25 °C

T_C= 70 °C

Continuous Drain Current

Pulsed Drain Current¹

I_D

I_DM

-4

-20

T_C= 25 °C

T_C= 70 °C

Power Dissipation

P_D

1.3

Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

°C

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

62.5

UNITS

°C / W

Junction-to-Ambient

R_θJA

¹Pulse width limited by maximum junction temperature.

²Duty cycle ≤ 1%

ELECTRICAL CHARACTERISTICS (T_C= 25 °C, Unless Otherwise Noted)

LIMITS

MIN TYP MAX

UNIT

PARAMETER

SYMBOL

TEST CONDITIONS

STATIC

V_GS= 0V, I_D= 250µA

N-Ch 30

P-Ch -30

Drain-Source Breakdown Voltage

Gate Threshold Voltage

V_(BR)DSS

V_GS= 0V, I_D= -250µA

V_DS= V_GS, I_D= 250µA

N-Ch

1.5

2.5

V_GS(th)

P-Ch -1

-1.5 -2.5

V_DS= V_GS, I_D= -250µA

JUL-26-2004

12 3 4 5 6 7 8

中文翻译

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