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OPA4872IDRG4 PDF预览

OPA4872IDRG4

更新时间: 2024-11-28 15:47:07
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
27页 984K
描述
1-CHANNEL, SGL ENDED MULTIPLEXER, PDSO14, GREEN, PLASTIC, SOIC-14

OPA4872IDRG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:GREEN, PLASTIC, SOIC-14针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.74Is Samacsys:N
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
湿度敏感等级:2负电源电压最大值(Vsup):-6 V
负电源电压最小值(Vsup):-3.5 V标称负供电电压 (Vsup):-5 V
信道数量:1功能数量:1
端子数量:14标称断态隔离度:88 dB
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:+-5 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer or Switches
最大供电电流 (Isup):11.7 mA最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):3.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

OPA4872IDRG4 数据手册

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OPA4872  
www.ti.com  
SBOS346C JUNE 2007REVISED MARCH 2011  
4:1 High-Speed Multiplexer  
Check for Samples: OPA4872  
1
FEATURES  
DESCRIPTION  
The OPA4872 offers a very wideband 4:1 multiplexer  
in an SO-14 package. Using only 10.6mA, the  
OPA4872 provides a user-settable output amplifier  
gain with greater than 500MHz large-signal  
bandwidth (2VPP). The switching glitch is improved  
over earlier solutions using a new (patented) input  
stage switching approach. This technique uses  
current steering as the input switch while maintaining  
an overall closed-loop design. The OPA4872 exhibits  
an off isolation of 88dB in either Disable or Shutdown  
mode. With greater than 500MHz small-signal  
bandwidth at a gain of 2, the OPA4872 gives a typical  
0.1dB gain flatness to greater than 120MHz.  
2
500MHz SMALL-SIGNAL BANDWIDTH  
500MHz, 2VPP BANDWIDTH  
0.1dB GAIN FLATNESS to 120MHz  
10ns CHANNEL SWITCHING TIME  
LOW SWITCHING GLITCH: 40mVPP  
2300V/μs SLEW RATE  
0.035%/0.005° DIFFERENTIAL GAIN, PHASE  
QUIESCENT CURRENT = 10.6mA  
1.1mA QUIESCENT CURRENT IN SHUTDOWN  
MODE  
88dB OFF ISOLATION IN DISABLE OR  
SHUTDOWN (10MHz)  
System power may be optimized using the chip  
enable feature for the OPA4872. Taking the chip  
enable (EN) line high powers down the OPA4872 to  
less than 3.4mA total supply current. Further power  
reduction to 1.1mA quiescent current can be  
achieved by bringing the shutdown (SD) line high.  
Muxing multiple OPA4872s outputs together, then  
using the chip enable to select which channels are  
active, increases the number of possible inputs.  
APPLICATIONS  
VIDEO ROUTER  
LCD AND PLASMA DISPLAY  
HIGH SPEED PGA  
DROP-IN UPGRADE TO AD8174  
+5V  
50W  
OPA695  
G = 1V/V  
-5V  
+5V  
523W  
50W  
IN0  
+5V  
OPA4872  
SD  
EN  
50W  
OPA695  
G = 2V/V  
-5V  
IN1  
IN2  
511W  
50W  
511W  
523W  
+5V  
To 50W Load  
50W  
523W  
OPA695  
G = 4V/V  
Logic  
-5V  
453W  
IN3  
A0 A1  
-5V  
149W  
+5V  
50W  
OPA695  
G = 8V/V  
-5V  
402W  
57.6W  
2-Bit, High-Speed PGA, Greater Than 300MHz Channel Bandwidth  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 20072011, Texas Instruments Incorporated  

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