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OP467AY/883C PDF预览

OP467AY/883C

更新时间： 2024-10-31 03:19:59
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亚德诺 - ADI 运算放大器
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20页 629K
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Quad Precision, High Speed Operational Amplifier

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OP467AY/883C 数据手册

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Quad Precision, High  
Speed Operational Amplifier  
OP467  
FEATURES  
PIN CONFIGURATIONS  
High slew rate: 170 V/μs  
OUT A  
–IN A  
+IN A  
V+  
1
2
3
4
5
6
7
14 OUT D  
13 –IN D  
Wide bandwidth: 28 MHz  
Fast settling time: <200 ns to 0.01%  
Low offset voltage: <500 μV  
Unity-gain stable  
Low voltage operation: 5 V to 15 V  
Low supply current: <10 mA  
Drives capacitive loads  
+
+
+IN D  
12  
11 V–  
OP467  
+IN B  
–IN B  
OUT B  
10 +IN C  
+
+
9
8
–IN C  
OUT C  
Figure 1. 14-Lead CERDIP (Y Suffix) and 14-Lead PDIP (P Suffix)  
APPLICATIONS  
High speed image display drivers  
High frequency active filters  
Fast instrumentation amplifiers  
High speed detectors  
Integrators  
Photo diode preamps  
3
2
1
20 19  
+IN A  
NC  
4
5
6
7
8
18 +IN D  
1
2
3
4
5
6
7
8
16  
OUT A  
–IN A  
+IN A  
V+  
OUT D  
17  
16  
15  
14  
NC  
15 –IN D  
OP467  
(TOP VIEW)  
V+  
V–  
14  
13  
12  
11  
10  
9
+IN D  
V–  
NC  
NC  
OP467  
+IN C  
+IN B  
+IN B  
–IN B  
OUT B  
NC  
+IN C  
–IN C  
OUT C  
NC  
9
10 11 12 13  
GENERAL DESCRIPTION  
The OP467 is a quad, high speed, precision operational  
amplifier. It offers the performance of a high speed op amp  
combined with the advantages of a precision op amp in a single  
package. The OP467 is an ideal choice for applications where,  
traditionally, more than one op amp was used to achieve this  
level of speed and precision.  
NC = NO CONNECT  
NC = NO CONNECT  
Figure 2. 16-Lead SOIC (S Suffix)  
Figure 3. 20-Terminal LCC (RC Suffix)  
V+  
The internal compensation of the OP467 ensures stable unity-  
gain operation, and it can drive large capacitive loads without  
oscillation. With a gain bandwidth product of 28 MHz driving a  
30 pF load, output slew rate is 170 V/μs, and settling time to  
0.01% in less than 200 ns, the OP467 provides excellent  
dynamic accuracy in high speed data acquisition systems. The  
channel-to-channel separation is typically 60 dB at 10 MHz.  
+IN  
OUT  
–IN  
The dc performance of the OP467 includes less than 0.5 mV of  
offset, a voltage noise density below 6 nV/√Hz, and a total  
supply current under 10 mA. The common-mode rejection  
ratio (CMRR) is typically 85 dB. The power supply rejection  
ratio (PSRR) is typically 107 dB. PSRR is maintained to better than  
40 dB with input frequencies as high as 1 MHz. The low offset and  
drift plus high speed and low noise make the OP467 usable in  
applications such as high speed detectors and instrumentation.  
V–  
Figure 4. Simplified Schematic  
The OP467 is specified for operation from 5 V to 15 V over  
the extended industrial temperature range (−40°C to +85°C)  
and is available in a 14-lead PDIP, a 14-lead CERDIP, a 16-lead  
SOIC, and a 20-terminal LCC.  
Contact your local sales office for the MIL-STD-883 data sheet  
and availability.  
Rev. F  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2007 Analog Devices, Inc. All rights reserved.  
 
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OP467AY/883C 替代型号

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