Preliminary
OP4007B
•
•
•
•
Quartz SAW Stabilized and Filtered “Diff Sine” Technology
Fundamental-Mode Oscillation at 669.128 MHz
Voltage Tunable for Phase Lock Loop Operations
669.128 MHz
Optical
Timing Clock
Optical Timing Reference for Forward Error Correction Applications
The output of this device is generated and filtered by narrowband quartz SAW elements at 669.128 MHz. The
configuration of this clock is intended to provide a pure signal for optical timing applications in noisy signal
environments. The Q/Qbar differential output swing of ±1 volt about 0 vdc has symmetry better than ±1% into
loads from 40 ohms to 70 ohms; determined by customer application. The long term frequency accuracy is
set by an external reference source allowing this device to complete a Phase Lock Loop design without the
usual noise and jitter problems associated with PLL’s.
Absolute Maximum Ratings
Rating
Value
0 to 5.5
0 to 6
Units
VDC
VDC
°C
DC Suppy Voltage
Tune Voltage
Case Temperature
-55 to 100
SMC-08
Electrical Characteristics
Characteristic
Sym
Notes
1, 9
2
Minimum
Typical
669.128
±100
Maximum
Units
MHz
ppm
Operating Frequency
Q and Q Output
Absolute Frequency
Tune Range
f
O
1
0
Tune Voltage
+3
VDC
1, 8
±5%
50
Tuning Linearity
Modulation Bandwidth
Voltage into 50 W (VSWR£1.2)
Operating Load VSWR
Symmetry
kHz
0.60
49
V
1,3
1,3
1.1
2:1
51
V
P-P
O
3, 4, 5
3, 4, 6
3, 4, 6, 7
%
-30
-60
Harmonic Spurious
Nonharmonic Spurious
dBc/Hz@100Hz offset
1kHz offset
dBc
dBc
Phase Noise
-70
-100
-125
-150
2
dBc/Hz
dBc/Hz
dBc/Hz
10k offset
Noise Floor
3, 4, 6, 7
3, 4, 6, 7
3
Q and Q Jitter
RMS Jitter
PS
PS
PS
P-P
P-P
P-P
No Noise on V
12
CC
200 mV
from 1MHz to ½ f on
12
P-P
O
Output DC Resistance (between Q & Q)
1, 3
50
KW
DC Power Supply
1, 3
3.13
5.25
70
Operating Voltage
Operating Current
V
3.3, 5.0
VDC
mA
°C
CC
1, 3
I
CC
Operating Case Temperature
T
1, 3
-40°C
+85°C
C
Lid Symbolization (YY=Year, WW=Week)
RFM OP4007B YYWW
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling. COCOM CAUTION: Approval by
the U.S. Department of Commerce is required prior to export of this device.
BLOCK DIAGRAM
Notes:
V
CC
1.
Unless otherwise noted, all specifications include any combination of load VSWR, VCC, and TA. In addition, Q and Q are terminated
into 50 W loads to ground. (See: Typical Test Circuit.)
2.
3.
4.
5.
6.
Customer useful tune range in excess of what part requires over temp, aging, pushing, pulling & accuracy.
The design, manufacturing process, and specifications of this device are subject to change without notice.
Only under the nominal conditions of 50 W load impedance with VSWR £ 1.2 and nominal power supply voltage.
Symmetry is defined as the pulse width (in percent of total period) measured at the 50% points of Q or Q. (See: Timing Definitions.)
Jitter and other spurious outputs induced by externally generated electrical noise on VCC or mechanical vibration are not included in
Q
_
Q
V
tune
this specification, except where noted. External voltage regulation and careful PCB layout are recommended for optimum perfor-
mance.
SAW Oscillator
Buffer Amplifier
7.
8.
Applies to period jitter of Q and Q. Measurements are made with the Tektronix CSA803 signal analyzer with at least 1000 samples.
Linearity is a function of the percentage variation from a permitted linear deviation versus the amount of frequency tune range. See
Linearity Definition.
9.
One or more of the following United States patents apply: 4,616,197; 4,670,681; 4,760,352.
RF Monolithics, Inc.
RFM Europe
Phone: (972) 233-2903
Phone: 44 1963 251383
Fax: (972) 387-8148
Fax: 44 1963 251510
E-mail: info@rfm.com
http://www.rfm.com
OP4007B-041003
Page 1 of 2
©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc.
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