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OP4006B1

更新时间： 2024-11-06 10:22:35
品牌 Logo 应用领域
RFM 时钟
页数 文件大小 规格书
2页 62K
描述
666.51 MHz Optical Timing Clock

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OP4006B1 数据手册

 浏览型号OP4006B1的Datasheet PDF文件第2页 
Preliminary  
®
OP4006B1  
•
•
•
•
Quartz SAW Stabilized Differential Output Technology  
Very Low Jitter Fundamental-Mode Operation at 666.51 MHz  
Voltage Tunable for Phase Locked Loop Applications  
666.51 MHz  
Optical  
Timing Clock  
Optical Timing Reference for Forward Error Correction Applications  
The OP4006B1 is a voltage-controlled SAW clock (VCSC) designed for phase-locked loop (PLL) applications  
in optical data communications systems. The differential outputs of the OP4006B1 are generated by high-Q,  
fundamental mode quartz surface acoustic wave (SAW) technology. This technique provides very low output  
jitter and phase noise, plus excellent immunity to power supply noise. The OP4006B1 differential outputs fea-  
ture ±1% symmetry, and can be DC-configured to drive a wide range of high-speed logic families. The  
OP4006B1 is packaged in a hermetic metal-ceramic LCC.  
Absolute Maximum Ratings  
Rating  
Value  
0 to 5.5  
Units  
Vdc  
Vdc  
°C  
DC Suppy Voltage  
Tune Voltage  
0 to 5.5  
SMC-08A  
Case Temperature  
-55 to 100  
Electrical Characteristics  
Characteristic  
Absolute Frequency  
Tuning Range  
Sym  
Notes  
Minimum  
Typical  
666.51  
±100  
Maximum  
3.3  
Units  
MHz  
ppm  
Vdc  
%
Operating Frequency  
Q and Q Output  
f
1
2
O
Tuning Voltage  
1
0
±5  
50  
Tuning Linearity  
Modulation Bandwidth  
1, 8  
kHz  
V
1,3  
1,3  
1.1  
V
Voltage into 50 W (VSWR £ 1.2)  
Operating Load VSWR  
Symmetry  
0.60  
49  
O
P-P  
2:1  
51  
3, 4, 5  
3, 4, 6  
3, 4, 6, 7  
3, 6  
%
Harmonic Spurious  
Nonharmonic Spurious  
@ 100 Hz offset  
@ 1 kHz offset  
dBc  
-15  
-60  
dBc  
Phase Noise  
-70  
-100  
-125  
-150  
1
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
ps  
3, 6  
3, 6  
@ 10 kHz offset  
Noise Floor  
3, 6  
3, 4, 6, 7  
3, 4, 6, 7  
Q and Q Jitter  
RMS Jitter  
No Noise on V  
12  
ps  
ps  
CC  
P-P  
P-P  
200 mV  
Noise, from 1 MHz to ½ f on V  
CC  
3
12  
P-P  
O
KW  
Vdc  
mA  
°C  
Output DC Resistance (between Q & Q)  
1, 3  
1, 3  
1, 3  
1, 3  
50  
Operating Voltage  
Operating Current  
V
I
3.3 or 5.0  
DC Power Supply  
3.13  
5.25  
70  
CC  
CC  
Operating Case Temperature  
T
-40°C  
+85°C  
C
Lid Symbolization (YY=Year, WW=Week)  
RFM OP4006B1 YYWW  
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling. COCOM CAUTION: Approval by the U.S. Department of Commerce is required  
prior to export of this device.  
Notes:  
1. Unless otherwise noted, all specifications include the combined effects of load VSWR, V and T .  
CC  
C
2. Net tuning range after tuning out the effects of initial manufacturing tolerances, VSWR pushing/pulling, V , T and aging.  
CC  
C
3. The internal design, manufacturing processes, and specifications of this device are subject to change without notice.  
4. Specified only for a balanced load with a VSWR < 1.2 ( 50 ohms each side), and a V = 3.0 Vdc.  
CC  
5. Symmetry is defined as the width in (% of total period) measure at 50% of the peak-to-peak voltage of either output.  
6. Jitter and other noise outputs due to power supply noise or mechanical vibration are not included in this specification except where noted.  
7. Applies to period jitter of either differential output. Measured with a Tektronix CSA803 signal analyzer with at least 1000 samples.  
8. See Figure 4.  
9. One or more of the following United States patents apply: 4, 616,197; 4,670,681; 4,760,352.  
RF Monolithics, Inc.  
RFM Europe  
Phone: (972) 233-2903  
Phone: 44 1963 251383  
Fax: (972) 387-8148  
Fax: 44 1963 251510  
E-mail: info@rfm.com  
http://www.rfm.com  
OP4006B1-041003  
Page 1 of 2  
©2001 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc.  
12

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