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OP27AZ/QMLR PDF预览

OP27AZ/QMLR

更新时间: 2024-01-18 11:18:59
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
21页 332K
描述
OP-AMP, 60uV OFFSET-MAX, 8MHz BAND WIDTH, CDIP8

OP27AZ/QMLR 技术参数

生命周期:Active包装说明:DIP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.57
放大器类型:OPERATIONAL AMPLIFIER最大平均偏置电流 (IIB):0.06 µA
标称共模抑制比:122 dB最大输入失调电压:60 µV
JESD-30 代码:R-GDIP-T8长度:10.29 mm
负供电电压上限:-22 V标称负供电电压 (Vsup):-15 V
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
座面最大高度:5.08 mm标称压摆率:2.8 V/us
子类别:Operational Amplifier供电电压上限:22 V
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL总剂量:100k Rad(Si) V
标称均一增益带宽:8000 kHz宽度:7.62 mm
Base Number Matches:1

OP27AZ/QMLR 数据手册

 浏览型号OP27AZ/QMLR的Datasheet PDF文件第2页浏览型号OP27AZ/QMLR的Datasheet PDF文件第3页浏览型号OP27AZ/QMLR的Datasheet PDF文件第4页浏览型号OP27AZ/QMLR的Datasheet PDF文件第5页浏览型号OP27AZ/QMLR的Datasheet PDF文件第6页浏览型号OP27AZ/QMLR的Datasheet PDF文件第7页 
Low Noise, Precision  
Operational Amplifier  
OP27  
Data Sheet  
FEATURES  
PIN CONFIGURATIONS  
BAL  
Low noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/√Hz  
Low drift: 0.2 μV/°C  
High speed: 2.8 V/μs slew rate, 8 MHz gain bandwidth  
Low VOS: 10 μV  
V+  
BAL 1  
OP27  
OUT  
–IN 2  
Excellent CMRR: 126 dB at VCM of 11 V  
High open-loop gain: 1.8 million  
Fits OP07, 5534A sockets  
NC  
+IN 3  
4V– (CASE)  
NC = NO CONNECT  
Available in die form  
Figure 1. 8-Lead TO-99 (J-Suffix)  
GENERAL DESCRIPTION  
1
2
3
4
8
7
6
5
The OP27 precision operational amplifier combines the low  
offset and drift of the OP07 with both high speed and low noise.  
Offsets down to 25 μV and maximum drift of 0.6 μV/°C make  
the OP27 ideal for precision instrumentation applications.  
Exceptionally low noise, en = 3.5 nV/√Hz, at 10 Hz, a low 1/f  
noise corner frequency of 2.7 Hz, and high gain (1.8 million),  
allow accurate high-gain amplification of low-level signals.  
A gain bandwidth product of 8 MHz and a 2.8 V/μs slew rate  
provide excellent dynamic accuracy in high speed, data-acquisition  
systems.  
V
TRIM  
V
TRIM  
–IN  
+IN  
V–  
OS  
OS  
OP27  
V+  
OUT  
NC  
NC = NO CONNECT  
Figure 2. 8-Lead CERDIP – Glass Hermetic Seal (Z-Suffix),  
8-Lead PDIP (P-Suffix), and 8-Lead SO (S-Suffix)  
A low input bias current of 10 nA is achieved by use of a bias  
current cancellation circuit. Over the military temperature  
range, this circuit typically holds IB and IOS to 20 nA and 15 nA,  
respectively.  
The output stage has good load driving capability. A guaranteed  
swing of 10 V into 600 Ω and low output distortion make the  
OP27 an excellent choice for professional audio applications.  
(Continued on Page 3)  
FUNCTIONAL BLOCK DIAGRAM  
V+  
C2  
R3  
1
R4  
R2  
1
8
Q6  
Q22  
Q46  
C1  
.
ADJ  
V
1
OS  
R23 R24  
Q24  
R1  
Q21  
Q23  
R9  
Q20 Q19  
OUTPUT  
R12  
Q1A Q1B  
Q2B Q2A  
NONINVERTING  
INPUT (+)  
C3  
C4  
R5  
Q3  
Q26  
INVERTING  
INPUT (–)  
Q45  
Q11 Q12  
Q27  
Q28  
1
R1 AND R2 ARE PERMANENTLY  
ADJUSTED AT WAFER TEST FOR  
MINIMUM OFFSET VOLTAGE  
V–  
Figure 3.  
Rev. G  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©1981–2015 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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