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OP16AZMDA PDF预览

OP16AZMDA

更新时间: 2024-11-06 03:52:39
品牌 Logo 应用领域
亚德诺 - ADI 运算放大器
页数 文件大小 规格书
12页 431K
描述
Precision JFET-Input Operational Amplifiers

OP16AZMDA 数据手册

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Precision JFET-Input  
Operational Amplifiers  
a
OP15/OP17  
FEATURES  
GENERAL DESCRIPTION  
Significant Performance Advantages over LF155 and  
LF157 Devices  
The ADI-JFET input series of devices offer clear advantages over  
industry-generic devices and are superior in both cost and perfor-  
mance to many dielectrically-isolated and hybrid op amps. All devices  
offer offset voltages as low as 0.5 mV with TCVOS guaranteed to  
5 mV/C. A unique input bias cancellation circuit reduces the IB  
by a factor 10 over conventional designs. In addition ADI specifies  
IB and IOS with the devices warmed up and operating at 25C ambient.  
Low Input Offset Voltages: 500 V Max  
Low Input Offset Voltage Drift: 2.0 V/؇C  
Minimum Slew Rate Guaranteed on All Models  
Temperature-Compensated Input Bias Currents  
Bias Current Specified Warmed-Up Over Temperature  
Internal Compensation  
Low Input Noise Current: 0.01 pA/÷Hz  
High Common-Mode Rejection Ratio: 100 dB  
Models with MIL-STD 883 Processing Available  
These devices were designed to provide real precision performance  
along with high speed. Although they can be nulled, the design  
objective was to provide low offset-voltage without nulling. Systems  
generally become more cost effective as the number of trim circuits  
is decreased. ADI achieves this performance by use of an improved  
bipolar compatible JFET process coupled with on chip, zener-zap  
offset trimming.  
OP15  
156 Speed with 155 Dissipation: 80 mW Typ  
Wide Bandwidth: 6 MHz  
High Slew Rate: 13 V/s  
Fast Settling to ±0.1%: 1,200 ns  
T he OP15 provides an excellent combinations of high speed and  
low input offset voltage. In addition, the OP15 offers the speed  
of the 156A op amp with the power dissipation of a 155A. T he  
combination of a low input offset voltage of 500 mV, slew rate of  
13 V/ms, and settling time of 1,200 ns to 0.1% makes the OP15  
an op amp of both precision and speed. T he additional features  
of low supply current coupled with an input bias current makes  
the OP15 ideal for a wide range of applications.  
OP17  
Highest Slew Rate: 60 V/s  
Fastest Settling to ±0.1%: 600 ns  
Highest Gain Bandwidth Product (AVCL = 5 Min): 30 MHz  
Guaranteed Input Bias Current @ 125؇C  
T he OP17 has a slew rate of 60 V/ms and is the best choice for  
applications requiring high closed-loop gain with high speed. See  
OP42 datasheet for unity gain applications and the OP215 datasheet  
for a dual configuration of the OP15.  
*R7, R8 ARE ELECTRONICALLY  
ADJUSTED ON CHIP FOR  
MINIMUM OFFSETVOLTAGE.  
V+  
J5  
R8*  
R7*  
Q5  
J8  
NULL  
NULL  
Q16  
Q6  
Q7  
R3  
Q9  
J6  
Q19  
Q24  
Q8  
R1  
J11  
NONINVERTING  
INPUT  
Q17  
Q22  
R13  
J1  
J2  
R2  
C2  
Q2  
–INV  
INPUT  
OUTPUT  
Q1  
Q10  
J9  
J10  
Q3  
Q4  
Q12  
Q23  
R5  
R6  
3.6k  
Q13  
Q11  
Q14  
Q20  
Q25  
3.6k⍀  
R3  
J4  
J3  
C1  
7.4pF  
Q21  
Q16  
Q15  
R11  
R4  
V–  
Figure 1. Simplified Schematic  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  

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