PNP - 2N6107, 2N6109,
2N6111; NPN - 2N6288,
2N6292
Complementary Silicon
Plastic Power Transistors
http://onsemi.com
These devices are designed for use in general−purpose amplifier and
switching applications.
7 AMPERE
Features
POWER TRANSISTORS
COMPLEMENTARY SILICON
30 − 50 − 70 VOLTS, 40 WATTS
• DC Current Gain Specified to 7.0 Amperes
h
FE
= 30−150 @ I
C
= 3.0 Adc − 2N6111, 2N6288
= 2.3 (Min) @ I = 7.0 Adc − All Devices
C
• Collector−Emitter Sustaining Voltage −
MARKING
DIAGRAM
V
= 30 Vdc (Min) − 2N6111, 2N6288
= 50 Vdc (Min) − 2N6109
CEO(sus)
= 70 Vdc (Min) − 2N6107, 2N6292
• High Current Gain − Bandwidth Product
4
f = 4.0 MHz (Min) @ I = 500 mAdc − 2N6288, 90, 92
T
C
= 10 MHz (Min) @ I = 500 mAdc − 2N6107, 09, 11
C
TO−220AB
CASE 221A
STYLE 1
2N6xxxG
AYWW
• TO−220AB Compact Package
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Note 1)
PIN 1. BASE
1
2. COLLECTOR
3. EMITTER
4. COLLECTOR
2
Rating
Symbol
Value
Unit
3
Collector−Emitter Voltage
2N6111, 2N6288
2N6109
V
Vdc
CEO
30
50
70
2N6xxx = Specific Device Code
xxx
G
A
= See Table on Page 4
= Pb−Free Package
= Assembly Location
= Year
2N6107, 2N6292
Collector−Base Voltage
2N6111, 2N6288
2N6109
V
Vdc
CB
40
60
80
Y
WW
= Work Week
2N6107, 2N6292
Emitter−Base Voltage
V
5.0
Vdc
Adc
EB
Collector Current − Continuous
− Peak
I
7.0
10
ORDERING INFORMATION
C
See detailed ordering, marking, and shipping information in
the package dimensions section on page 4 of this data sheet.
Base Current
I
B
3.0
Adc
Total Power Dissipation @ T = 25_C
P
D
40
0.32
W
W/°C
C
Derate above 25_C
Operating and Storage Junction
Temperature Range
T , T
−65 to +150
°C
J
stg
THERMAL CHARACTERISTICS
Characteristics
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
R
3.125
_C/W
q
JC
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Indicates JEDEC Registered Data.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
October, 2011 − Rev. 9
2N6107/D