PNP − 2N6040, 2N6042,
NPN − 2N6043, 2N6045
2N6043 and 2N6045 are Preferred Devices
Plastic Medium−Power
Complementary Silicon
Transistors
http://onsemi.com
Plastic medium−power complementary silicon transistors are
designed for general−purpose amplifier and low−speed switching
applications.
DARLINGTON, 8 AMPERES
COMPLEMENTARY SILICON
POWER TRANSISTORS
Features
• High DC Current Gain − h = 2500 (Typ) @ I = 4.0 Adc
FE
C
60 − 100 VOLTS, 75 WATTS
• Collector−Emitter Sustaining Voltage − @ 100 mAdc −
V
= 60 Vdc (Min) − 2N6040, 2N6043
CEO(sus)
= 100 Vdc (Min) − 2N6042, 2N6045
• Low Collector−Emitter Saturation Voltage −
V
CE(sat)
= 2.0 Vdc (Max) @ I = 4.0 Adc − 2N6043,44
C
= 2.0 Vdc (Max) @ I = 3.0 Adc − 2N6042, 2N6045
C
• Monolithic Construction with Built−In Base−Emitter Shunt Resistors
• Epoxy Meets UL 94 V−0 @ 0.125 in
TO−220AB
CASE 221A−09
STYLE 1
• ESD Ratings:
Human Body Model, 3B > 8000 V
1
Machine Model, C > 400 V
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Note 1)
MARKING DIAGRAM
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
2N6040
V
CEO
60
Vdc
2N6043
2N6042
2N6045
100
Collector−Base Voltage
2N6040
2N6043
2N6042
2N6045
V
CB
60
Vdc
100
2N604xG
AYWW
Emitter−Base Voltage
Collector Current
V
5.0
Vdc
Adc
EB
Continuous
Peak
I
8.0
16
C
Base Current
I
B
120
mAdc
2N604x = Device Code
x = 0, 2, 3, or 5
Total Power Dissipation @ T = 25°C
P
75
0.60
W
W/°C
C
D
Derate above 25°C
A
Y
= Assembly Location
= Year
Operating and Storage Junction
Temperature Range
T , T
J
–65 to +150
°C
stg
WW
G
= Work Week
= Pb−Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Indicates JEDEC Registered Data.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
May, 2006 − Rev. 7
2N6040/D