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OMAP3515DCUSR PDF预览

OMAP3515DCUSR

更新时间： 2024-02-17 08:13:31
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
264页 3466K
描述
IC,GRAPHICS PROCESSOR,CMOS,BGA,423PIN,PLASTIC

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OMAP3515DCUSR 技术参数

是否Rohs认证：符合生命周期：Active
零件包装代码：BGA包装说明：FCBGA-423
针数：423Reach Compliance Code：compliant
ECCN代码：5A992.CHTS代码：8542.31.00.01
Factory Lead Time：1 week风险等级：0.62
Is Samacsys：N桶式移位器：NO
边界扫描：YES最大时钟频率：59 MHz
格式：FLOATING POINT集成缓存：YES
内部总线架构：SINGLEJESD-30 代码：S-PBGA-B423
JESD-609代码：e1长度：16 mm
低功率模式：YES湿度敏感等级：4
DMA 通道数量：32端子数量：423
计时器数量：15片上数据RAM宽度：32
片上程序ROM宽度：32最高工作温度：90 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装等效代码：BGA423,24X24,25
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：1.1,1.8,3.3 V
认证状态：Not QualifiedRAM（字数）：32768
ROM可编程性：MROM座面最大高度：1.4 mm
子类别：Graphics Processors最大供电电压：1.91 V
最小供电电压：1.71 V标称供电电压：1.8 V
表面贴装：YES技术：CMOS
温度等级：OTHER端子面层：Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：BALL端子节距：0.65 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：16 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：1

OMAP3515DCUSR 数据手册

 浏览型号OMAP3515DCUSR的Datasheet PDF文件第2页浏览型号OMAP3515DCUSR的Datasheet PDF文件第3页浏览型号OMAP3515DCUSR的Datasheet PDF文件第4页浏览型号OMAP3515DCUSR的Datasheet PDF文件第5页浏览型号OMAP3515DCUSR的Datasheet PDF文件第6页浏览型号OMAP3515DCUSR的Datasheet PDF文件第7页 
OMAP3515/03 Applications Processor  
www.ti.com  
SPRS505F–FEBRUARY 2008–REVISED SEPTEMBER 2009  
1 OMAP3515/03 Applications Processor  
1.1 Features  
•
•
•
112K-Byte ROM  
•
OMAP3515/03 Applications Processor:  
–
–
OMAP™ 3 Architecture  
MPU Subsystem  
64K-Byte Shared SRAM  
Endianess:  
•
•
Up to 720-MHz ARM Cortex™-A8 Core  
NEON™ SIMD Coprocessor  
–
–
ARM Instructions - Little Endian  
ARM Data – Configurable  
–
POWERVR SGX™ Graphics Accelerator  
(OMAP3515 Device Only)  
•
External Memory Interfaces:  
–
SDRAM Controller (SDRC)  
•
Tile Based Architecture Delivering up to  
10 MPoly/sec  
•
•
•
16, 32-bit Memory Controller With  
1G-Byte Total Address Space  
Interfaces to Low-Power Double Data  
Rate (LPDDR) SDRAM  
SDRAM Memory Scheduler (SMS) and  
Rotation Engine  
•
Universal Scalable Shader Engine:  
Multi-threaded Engine Incorporating  
Pixel and Vertex Shader Functionality  
•
•
•
Industry Standard API Support:  
OpenGLES 1.1 and 2.0, OpenVG1.0  
Fine Grained Task Switching, Load  
Balancing, and Power Management  
Programmable High Quality Image  
Anti-Aliasing  
–
General Purpose Memory Controller  
(GPMC)  
•
•
•
16-bit Wide Multiplexed Address/Data  
Bus  
Up to 8 Chip Select Pins With 128M-Byte  
Address Space per Chip Select Pin  
Glueless Interface to NOR Flash, NAND  
Flash (With ECC Hamming Code  
–
–
Fully Software-Compatible With ARM9™  
Commercial and Extended Temperature  
Grades  
•
ARM Cortex™-A8 Core  
Calculation), SRAM and Pseudo-SRAM  
–
ARMv7 Architecture  
•
•
Flexible Asynchronous Protocol Control  
for Interface to Custom Logic (FPGA,  
CPLD, ASICs, etc.)  
Nonmultiplexed Address/Data Mode  
(Limited 2K-Byte Address Space)  
•
•
•
Trust Zone®  
Thumb®-2  
MMU Enhancements  
–
In-Order, Dual-Issue, Superscalar  
Microprocessor Core  
NEON™ Multimedia Architecture  
Over 2x Performance of ARMv6 SIMD  
Supports Both Integer and Floating Point  
SIMD  
Jazelle® RCT Execution Environment  
Architecture  
Dynamic Branch Prediction with Branch  
Target Address Cache, Global History  
Buffer, and 8-Entry Return Stack  
•
•
System Direct Memory Access (sDMA)  
Controller (32 Logical Channels With  
Configurable Priority)  
–
–
–
Camera Image Signal Processing (ISP)  
–
–
–
–
CCD and CMOS Imager Interface  
Memory Data Input  
RAW Data Interface  
BT.601/BT.656 Digital YCbCr 4:2:2  
(8-/10-Bit) Interface  
A-Law Compression and Decompression  
Preview Engine for Real-Time Image  
Processing  
Glueless Interface to Common Video  
Decoders  
Histogram Module/Auto-Exposure,  
Auto-White Balance, and Auto-Focus  
Engine  
–
–
–
–
–
Embedded Trace Macrocell (ETM) Support  
for Non-Invasive Debug  
•
ARM Cortex™-A8 Memory Architecture:  
–
–
–
–
–
16K-Byte Instruction Cache (4-Way  
Set-Associative)  
16K-Byte Data Cache (4-Way  
Set-Associative)  
256K-Byte L2 Cache  
–
Resize Engine  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this document.  
POWERVR SGX is a trademark of Imagination Technologies Ltd.  
OMAP is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2009, Texas Instruments Incorporated  
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