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OMAP3503ECBB PDF预览

OMAP3503ECBB

更新时间： 2024-01-16 23:51:10
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
227页 2954K
描述
Sitara processor: Arm Cortex-A8, LPDDR 515-POP-FCBGA 0 to 90

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OMAP3503ECBB 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Lifetime Buy零件包装代码：BGA
包装说明：VFBGA, BGA515,26X26,20针数：515
Reach Compliance Code：compliantHTS代码：8542.31.00.01
风险等级：5.83桶式移位器：NO
边界扫描：YES最大时钟频率：19.2 MHz
集成缓存：YES内部总线架构：SINGLE
JESD-30 代码：S-PBGA-B515JESD-609代码：e1
长度：14 mm低功率模式：YES
湿度敏感等级：3DMA 通道数量：32
端子数量：515计时器数量：15
片上数据RAM宽度：8片上程序ROM宽度：8
最高工作温度：90 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA515,26X26,20封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：1.1,1.8,3 V认证状态：Not Qualified
RAM（字数）：65536ROM可编程性：MROM
座面最大高度：0.95 mm子类别：Graphics Processors
表面贴装：YES技术：CMOS
温度等级：OTHER端子面层：Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：BALL端子节距：0.5 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER

OMAP3503ECBB 数据手册

 浏览型号OMAP3503ECBB的Datasheet PDF文件第2页浏览型号OMAP3503ECBB的Datasheet PDF文件第3页浏览型号OMAP3503ECBB的Datasheet PDF文件第4页浏览型号OMAP3503ECBB的Datasheet PDF文件第5页浏览型号OMAP3503ECBB的Datasheet PDF文件第6页浏览型号OMAP3503ECBB的Datasheet PDF文件第7页 
OMAP3515/03 Applications Processor  
www.ti.com  
SPRS505–FEBRUARY 2008  
1 OMAP3515/03 Applications Processor  
1.1 Features  
•
External Memory Interfaces:  
•
OMAP3515/03 Applications Processor:  
–
SDRAM Controller (SDRC)  
–
–
OMAP™ 3 Architecture  
MPU Subsystem  
•
•
•
16, 32-bit Memory Controller With  
2G-Byte Total Address Space  
Interfaces to Low-Power Double Data  
Rate (LPDDR) SDRAM  
SDRAM Memory Scheduler (SMS) and  
Rotation Engine  
•
•
600-MHz ARM Cortex™-A8 Core  
NEON™ SIMD Coprocessor  
–
2D/3D Graphics Accelerator (OMAP3515  
Device Only)  
•
Tile Based Architecture Delivering 10  
MPoly/sec  
–
General Purpose Memory Controller  
(GPMC)  
•
Universal Scalable Shader Engine:  
Multi-threaded Engine Incorporating  
Pixel and Vertex Shader Functionality  
•
•
•
16-bit Wide Multiplexed Address/Data  
Bus  
Up to 8 Chip Select Pins With 129M-Byte  
Address Space per Chip Select Pin  
Glueless Interface to NOR Flash, NAND  
Flash (With ECC Hamming Code  
•
Industry Standard API Support:  
OpenGLES 1.1 and 2.0, OpenVG1.0 and  
Direct3D Mobile  
•
•
Fine Grained Task Switching, Load  
Balancing, and Power Management  
Programmable High Quality Image  
Anti-Aliasing  
Calculation), SRAM and Pseudo-SRAM  
•
•
Flexible Asynchronous Protocol Control  
for Interface to Custom Logic (FPGA,  
CPLD, ASICs, etc.)  
Nonmultiplexed Address/Data Mode  
(Limited 2K-Byte Address Space)  
–
Fully Software-Compatible With ARM9™  
•
ARM Cortex™-A8 Core  
–
–
ARMv7 Architecture  
•
•
System Direct Memory Access (sDMA)  
Controller (32 Logical Channels With  
Configurable Priority)  
•
•
•
Trust Zone®  
Thumb®-2  
MMU Enhancements  
Camera Image Signal Processing (ISP)  
In-Order, Dual-Issue, Superscalar  
Microprocessor Core  
NEON™ Multimedia Architecture  
Over 2x Performance of ARMv6 SIMD  
Supports Both Integer and Floating Point  
SIMD  
Jazelle® RCT Execution Environment  
Architecture  
Dynamic Branch Prediction with Branch  
Target Address Cache, Global History  
Buffer, and 8-Entry Return Stack  
–
–
–
–
CCD and CMOS Imager Interface  
Memory Data Input  
RAW Data Interface  
BT.601/BT.656 Digital YCbCr 4:2:2  
(8-/16-Bit) Interface  
A-Law Compression and Decompression  
Preview Engine for Real-Time Image  
Processing  
Glueless Interface to Common Video  
Decoders  
Histogram Module/Auto-Exposure,  
Auto-White Balance, and Auto-Focus  
Engine  
–
–
–
–
–
–
–
–
–
–
Embedded Trace Macrocell (ETM) Support  
for Non-Invasive Debug  
•
•
ARM Cortex™-A8 Memory Architecture:  
–
Resize Engine  
–
–
–
16K-Byte Instruction Cache (4-Way  
Set-Associative)  
16K-Byte Data Cache (4-Way  
Set-Associative)  
•
•
Resize Images From 1/4x to 4x  
Separate Horizontal/Vertical Control  
•
Display Subsystem  
Parallel Digital Output  
–
256K-Byte L2 Cache  
•
•
Up to 24-Bit RGB  
HD Maximum Resolution  
Endianess: ARM Big Endian  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this document.  
is a trademark of ~ Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCT PREVIEW information concerns products in the  
formative or design phase of development. Characteristic data and  
other specifications are design goals. Texas Instruments reserves  
the right to change or discontinue these products without notice.  
Copyright © 2008, Texas Instruments Incorporated  
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OMAP3503ECBB 替代型号

型号 品牌 替代类型 描述 数据表
OMAP3503DCBB TI

完全替代

 Applications Processor 515-POP-FCBGA 0 to 90
OMAP3503DCBC TI

完全替代

 Applications Processor 515-POP-FCBGA 0 to 90

与OMAP3503ECBB相关器件

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OMAP3503ECBBA TI

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 		Sitara processor: Arm Cortex-A8, LPDDR 515-POP-FCBGA -40 to 105
OMAP3503ECBBALPD TI

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OMAP3503ECUS TI

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OMAP3503ECUS72 TI

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OMAP3503ECUSA TI

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OMAP3515 TI

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 		Applications Processor
OMAP3515_08 TI

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 		Applications Processor
OMAP3515BCUS TI

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 		IC,GRAPHICS PROCESSOR,CMOS,BGA,423PIN,PLASTIC
OMAP3515DCBC TI

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 		OMAP3515/03 Applications Processor
OMAP3515DCBCA TI

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 		Applications Processor 515-POP-FCBGA -40 to 105

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