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OMAP3503DCBB PDF预览

OMAP3503DCBB

更新时间： 2024-02-22 17:21:11
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
264页 2714K
描述
Applications Processor 515-POP-FCBGA 0 to 90

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OMAP3503DCBB 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA515,23X23,20针数：515
Reach Compliance Code：unknownECCN代码：3A001.A.3
HTS代码：8542.31.00.01Factory Lead Time：1 week
风险等级：6.83地址总线宽度：26
桶式移位器：NO边界扫描：YES
最大时钟频率：59 MHz外部数据总线宽度：16
格式：FLOATING POINT内部总线架构：SINGLE
JESD-30 代码：S-PBGA-B515JESD-609代码：e1
长度：12 mm低功率模式：YES
湿度敏感等级：3端子数量：515
最高工作温度：90 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA515,23X23,20封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：1.1,1.8,3.3 V认证状态：Not Qualified
座面最大高度：0.9 mm子类别：Graphics Processors
最大供电电压：1.91 V最小供电电压：1.71 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：OTHER
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.4 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
uPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches：1

OMAP3503DCBB 数据手册

 浏览型号OMAP3503DCBB的Datasheet PDF文件第2页浏览型号OMAP3503DCBB的Datasheet PDF文件第3页浏览型号OMAP3503DCBB的Datasheet PDF文件第4页浏览型号OMAP3503DCBB的Datasheet PDF文件第5页浏览型号OMAP3503DCBB的Datasheet PDF文件第6页浏览型号OMAP3503DCBB的Datasheet PDF文件第7页 
OMAP3515, OMAP3503  
www.ti.com  
SPRS505H –FEBRUARY 2008–REVISED OCTOBER 2013  
OMAP3515 and OMAP3503 Applications Processors  
Check for Samples: OMAP3515, OMAP3503  
1 OMAP3515 and OMAP3503 Applications Processors  
1.1 Features  
12  
– 256-KB L2 Cache  
• 112KB of ROM  
• OMAP3515 and OMAP3503 Devices:  
– OMAP™ 3 Architecture  
– MPU Subsystem  
• 64KB of Shared SRAM  
• Endianess:  
– ARM Instructions – Little Endian  
– ARM Data – Configurable  
• External Memory Interfaces:  
– SDRAM Controller (SDRC)  
•
•
Up to 720-MHz ARM® Cortex™-A8 Core  
NEON™ SIMD Coprocessor  
– PowerVR® SGX™ Graphics Accelerator  
(OMAP3515 Device Only)  
•
Tile-Based Architecture Delivering up to  
10 MPoly/sec  
•
•
•
16- and 32-Bit Memory Controller with  
1GB of Total Address Space  
Interfaces to Low-Power Double Data  
Rate (LPDDR) SDRAM  
SDRAM Memory Scheduler (SMS) and  
Rotation Engine  
•
Universal Scalable Shader Engine: Multi-  
threaded Engine Incorporating Pixel and  
Vertex Shader Functionality  
•
•
•
Industry Standard API Support:  
OpenGLES 1.1 and 2.0, OpenVG1.0  
Fine-Grained Task Switching, Load  
Balancing, and Power Management  
Programmable High-Quality Image Anti-  
Aliasing  
– General Purpose Memory Controller (GPMC)  
•
•
•
16-Bit-Wide Multiplexed Address and  
Data Bus  
Up to 8 Chip-Select Pins with 128-MB  
Address Space per Chip-Select Pin  
Glueless Interface to NOR Flash, NAND  
Flash (with ECC Hamming Code  
– Fully Software-Compatible with ARM9™  
– Commercial and Extended Temperature  
Grades  
• ARM Cortex-A8 Core  
– ARMv7 Architecture  
Calculation), SRAM, and Pseudo-SRAM  
•
•
Flexible Asynchronous Protocol Control  
for Interface to Custom Logic (FPGA,  
CPLD, ASICs, and so forth)  
Nonmultiplexed Address and Data Mode  
(Limited 2-KB Address Space)  
•
•
•
TrustZone®  
Thumb®-2  
MMU Enhancements  
– In-Order, Dual-Issue, Superscalar  
Microprocessor Core  
– NEON Multimedia Architecture  
– Over 2x Performance of ARMv6 SIMD  
– Supports Both Integer and Floating-Point  
SIMD  
– Jazelle® RCT Execution Environment  
Architecture  
– Dynamic Branch Prediction with Branch  
Target Address Cache, Global History  
Buffer, and 8-Entry Return Stack  
• System Direct Memory Access (sDMA)  
Controller (32 Logical Channels with  
Configurable Priority)  
• Camera Image Signal Processor (ISP)  
– CCD and CMOS Imager Interface  
– Memory Data Input  
– BT.601 (8-Bit) and BT.656 (10-Bit) Digital  
YCbCr 4:2:2 Interface  
– Glueless Interface to Common Video  
Decoders  
– Resize Engine  
– Embedded Trace Macrocell (ETM) Support  
for Noninvasive Debug  
•
•
Resize Images From 1/4x to 4x  
Separate Horizontal and Vertical Control  
• ARM Cortex-A8 Memory Architecture:  
• Display Subsystem  
– 16-KB Instruction Cache (4-Way Set-  
Associative)  
– Parallel Digital Output  
– 16-KB Data Cache (4-Way Set-Associative)  
•
Up to 24-Bit RGB  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date. Products conform to  
specifications per the terms of the Texas Instruments standard warranty. Production  
processing does not necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  
 
 
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OMAP3503DCBB 替代型号

型号 品牌 替代类型 描述 数据表
OMAP3515ECBB TI

完全替代

 Sitara 处理器：Arm Cortex-A8、3D 图形、LPDDR | CBB |
OMAP3503ECBB TI

完全替代

 Sitara processor: Arm Cortex-A8, LPDDR 515-POP-FCBGA 0 to 90

与OMAP3503DCBB相关器件

型号 品牌 获取价格 描述 数据表
OMAP3503DCBBA TI

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 		OMAP3515 and OMAP3503 Applications Processors
OMAP3503DCBC TI

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 		Applications Processor 515-POP-FCBGA 0 to 90
OMAP3503DCBCA TI

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 		Applications Processor 515-POP-FCBGA -40 to 105
OMAP3503DCUSA TI

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 		Applications Processor 423-FCBGA -40 to 105
OMAP3503ECBB TI

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 		Sitara processor: Arm Cortex-A8, LPDDR 515-POP-FCBGA 0 to 90
OMAP3503ECBBA TI

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 		Sitara processor: Arm Cortex-A8, LPDDR 515-POP-FCBGA -40 to 105
OMAP3503ECBBALPD TI

获取价格

 		Sitara 处理器：Arm Cortex-A8、LPDDR | CBB | 515 |
OMAP3503ECUS TI

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 		Sitara 处理器：Arm Cortex-A8、LPDDR | CUS | 423 |
OMAP3503ECUS72 TI

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 		Sitara 处理器：Arm Cortex-A8、LPDDR | CUS | 423 |
OMAP3503ECUSA TI

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 		暂无描述

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