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OCX481-PB172I

更新时间： 2024-02-28 21:59:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 外围集成电路
页数 文件大小 规格书
24页 133K
描述
Crossbar Switch, CMOS, PBGA172, 1.27 MM PITCH, PLASTIC, BGA-172

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中文翻译

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OCX481-PB172I 技术参数

生命周期：Transferred包装说明：BGA-172
Reach Compliance Code：unknown风险等级：5.73
边界扫描：NOJESD-30 代码：X-PBGA-X172
低功率模式：NO端子数量：172
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装形状：UNSPECIFIED
封装形式：GRID ARRAY认证状态：Not Qualified
最大供电电压：2.625 V最小供电电压：2.375 V
标称供电电压：2.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：UNSPECIFIED端子位置：BOTTOM
uPs/uCs/外围集成电路类型：DSP PERIPHERAL, CROSSBAR SWITCHBase Number Matches：1

OCX481-PB172I 数据手册

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OCX481 Crosspoint Switch  
Advanced Mini Data Sheet  
Features  
• 1.6 Gb/s port data bandwidth, >38Gb/s aggregate bandwidth • Full Broadcast and multicast capability  
– One-to-One and One-to-Many connections  
– Special broadcast mode routes one input to  
all outputs at maximum data rate  
• Low power CMOS, 2.5V and 3.3V power supply  
• SRAM-based, in-system programmable  
• 48 configurable I/O ports  
• Low jitter and signal skew  
• Low duty cycle distortion  
– 24 dedicated differential input ports  
– 24 dedicated differential output ports  
– Supports LVPECL and LVDS I/O  
– LVTTL control interface  
• RapidConfigure™ parallel interface for  
configuration and readback  
– Output Enable control for all outputs  
• Serial programming interface for  
• Non-blocking switch matrix  
configuration  
– Patented ActiveArray™ matrix for superior performance  
– Double-buffered configuration RAM cells for simultaneous  
global updates  
• 172 BGA package with 1.27mm ball spacing  
• Integrated Termination Resistors  
– ImpliedDisconnect™ function for single cycle disconnect/  
connect  
Description  
The OCX481 SRAM-based device is a non-blocking 24 X 24 digital crosspoint switch capable of data rates of  
1.6 Gigabits per second per port. The I/O ports are fixed as either input or output ports. The input and output  
ports operate in flow-through (asynchronous) mode.  
The patented ActiveArray provides greater density, superior performance, and greater flexibility compared to a  
traditional n:1 multiplexer architecture. The OCX™ devices support various operating modes covering one input  
to one output at a time as well as one input to many outputs, plus a special broadcast mode to program one input  
to all outputs while maintaining maximum data rates. In all modes data integrity and connections are maintained  
on all unchanged data paths.  
The RapidConfigure parallel interface allows fast configuration of the Output Buffers and the switch matrix.  
Readback is supported for device test and verification purposes. A functional block diagram of the OCX481 is  
shown in Figure 1.  
Applications  
• SONET/SDH and DWDM  
• Digital Cross-Connects  
• System Backplanes and Interconnects  
• High Speed Test Equipment  
• ATM Switch Cores  
• Video Switching  
48  
48  
OUT[23:0]  
IN[23:0]  
24 x 24  
Crosspoint  
Switch Matrix  
Input  
Buffers  
Output  
Buffers  
OE#  
7
7
4
RCA[6:0]  
RCB[6:0]  
RCI[3:0]  
RapidConfigure  
Signals  
Configuration and  
Programming Logic  
RCO[2:0] 3  
RC_CLK#  
RC_EN#  
HW_RST#  
UPDATE#  
Figure 1 OCX481 Functional Block Diagram  
I-Cube, Inc.  
[Rev. 1.3] 9/17/01  
1
 
 
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