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NVMTS2D0N08H PDF预览

NVMTS2D0N08H

更新时间： 2024-11-11 20:11:39
品牌 Logo 应用领域
安森美 - ONSEMI 脉冲光电二极管晶体管
页数 文件大小 规格书
4页 328K
描述
Power Field-Effect Transistor

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中文翻译

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NVMTS2D0N08H 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：SMALL OUTLINE, R-PDSO-F5Reach Compliance Code：compliant
风险等级：5.76外壳连接：DRAIN
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：80 V
最大漏极电流 (Abs) (ID)：207 A最大漏极电流 (ID)：207 A
最大漏源导通电阻：0.002 ΩFET 技术：METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss)：25 pFJESD-30 代码：R-PDSO-F5
元件数量：1端子数量：5
工作模式：ENHANCEMENT MODE最高工作温度：175 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
极性/信道类型：N-CHANNEL最大功率耗散 (Abs)：205 W
最大脉冲漏极电流 (IDM)：900 A参考标准：AEC-Q101
表面贴装：YES端子形式：FLAT
端子位置：DUAL晶体管元件材料：SILICON
Base Number Matches：1

NVMTS2D0N08H 数据手册

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MOSFET - Power, Single  
N-Channel  
80 V, 2 mW, 207 A  
Product Preview  
NVMTS2D0N08H  
www.onsemi.com  
Features  
• Small Footprint (8x8 mm) for Compact Design  
• Low R  
to Minimize Conduction Losses  
V
R
MAX  
I MAX  
D
DS(on)  
(BR)DSS  
DS(ON)  
• Low Q and Capacitance to Minimize Driver Losses  
G
80 V  
2 mW @ 10 V  
207 A  
• AEC−Q101 Qualified and PPAP Capable  
• These Devices are Pb−Free and are RoHS Compliant  
D (5−8)  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
Drain−to−Source Voltage  
Symbol  
Value  
80  
Unit  
V
V
DSS  
G (1)  
Gate−to−Source Voltage  
V
GS  
20  
V
Continuous Drain  
Current R  
T
= 25°C  
= 100°C  
= 25°C  
I
207  
146  
205  
103  
32.3  
22.8  
5
A
C
D
S (2−4)  
q
JC  
T
C
(Notes 1, 3)  
Steady  
State  
N−CHANNEL MOSFET  
Power Dissipation  
T
C
P
W
A
D
R
(Note 1)  
q
JC  
T
C
= 100°C  
Continuous Drain  
Current R  
T = 25°C  
A
I
D
q
JA  
T = 100°C  
A
(Notes 1, 2, 3)  
Steady  
State  
Power Dissipation  
T = 25°C  
A
P
W
D
R
(Notes 1, 2)  
q
JA  
T = 100°C  
A
2.5  
Pulsed Drain Current  
T = 25°C, t = 10 ms  
I
DM  
900  
A
A
p
Operating Junction and Storage Temperature  
Range  
T , T  
−55 to  
+ 175  
°C  
J
stg  
DFNW8  
CASE 507AP  
Source Current (Body Diode)  
I
S
250  
A
Single Pulse Drain−to−Source Avalanche  
E
AS  
TBD  
mJ  
Energy (I  
= 28.9 A)  
MARKING DIAGRAM  
L(pk)  
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
L
260  
°C  
NVMTS  
2D0N08H  
AWLYWW  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
THERMAL RESISTANCE MAXIMUM RATINGS  
A
= Assembly Location  
Parameter  
Symbol  
Value  
0.73  
30  
Unit  
WL = 2−digit Wafer Lot Code  
= Year Code  
WW = Work Week Code  
Y
Junction−to−Case − Steady State  
Junction−to−Ambient − Steady State (Note 2)  
R
°C/W  
q
JC  
R
q
JA  
1. The entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 2 of this data sheet.  
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
3. Maximum current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
© Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
November, 2019 − Rev. P0  
NVMTS2D0N08H/D  
 
1234

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