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NVD5490NLT4G-VF01

更新时间： 2024-11-10 11:01:35
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
6页 82K
描述
功率 MOSFET 60V，17A，64 mΩ，单 N 沟道，DPAK，逻辑电平。

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NVD5490NLT4G-VF01 数据手册

 浏览型号NVD5490NLT4G-VF01的Datasheet PDF文件第2页浏览型号NVD5490NLT4G-VF01的Datasheet PDF文件第3页浏览型号NVD5490NLT4G-VF01的Datasheet PDF文件第4页浏览型号NVD5490NLT4G-VF01的Datasheet PDF文件第5页浏览型号NVD5490NLT4G-VF01的Datasheet PDF文件第6页 
NVD5490NL  
Power MOSFET  
60 V, 64 mW, 17 A, Single N−Channel  
Features  
• Low R  
to Minimize Conduction Losses  
• High Current Capability  
DS(on)  
www.onsemi.com  
• Avalanche Energy Specified  
• AEC−Q101 Qualified and PPAP Capable  
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
V
R
I
D
(BR)DSS  
DS(on)  
64 mW @ 10 V  
85 mW @ 4.5 V  
60 V  
17 A  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
D (2,4)  
Parameter  
Drain−to−Source Voltage  
Symbol  
Value  
60  
Unit  
V
V
DSS  
Gate−to−Source Voltage  
Continuous Drain Cur-  
V
"20  
17  
V
GS  
N−Channel  
G (1)  
T
= 25°C  
= 100°C  
= 25°C  
I
A
C
D
rent R  
(Notes 1 & 3)  
q
JC  
T
C
12  
Steady  
State  
S (3)  
4
Power Dissipation R  
(Note 1)  
T
C
P
49  
W
A
q
D
D
JC  
T
C
= 100°C  
24  
Continuous Drain Cur-  
T = 25°C  
A
I
5.0  
D
rent R  
3)  
(Notes 1, 2 &  
q
JA  
2
1
T = 100°C  
A
3.0  
Steady  
State  
3
Power Dissipation R  
(Notes 1 & 2)  
T = 25°C  
A
P
3.4  
1.7  
71  
W
q
JA  
DPAK  
CASE 369AA  
STYLE 2  
T = 100°C  
A
Pulsed Drain Current  
T = 25°C, t = 10 ms  
I
DM  
A
A
A
p
Current Limited by  
Package (Note 3)  
T = 25°C  
I
30  
A
Dmaxpkg  
MARKING DIAGRAMS  
& PIN ASSIGNMENT  
Operating Junction and Storage Temperature  
Source Current (Body Diode)  
T , T  
J
−55 to  
175  
°C  
4
stg  
Drain  
I
41  
41  
A
S
Single Pulse Drain−to−Source Avalanche  
E
mJ  
AS  
Energy (T = 25°C, V = 30 V, V = 10 V,  
J
DD  
GS  
I
= 9.0 A, L = 1.0 mH, R = 25 W)  
L(pk)  
G
2
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
L
260  
°C  
Drain  
1
3
Gate Source  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
A
Y
= Assembly Location*  
= Year  
THERMAL RESISTANCE MAXIMUM RATINGS  
WW  
= Work Week  
5490L = Device Code  
= Pb−Free Package  
Parameter  
Symbol  
Value  
Unit  
G
Junction−to−Case − Steady State (Drain)  
R
3.1  
44  
°C/W  
q
q
JC  
* The Assembly Location code (A) is front side  
optional. In cases where the Assembly Location is  
stamped in the package, the front side assembly  
code may be blank.  
Junction−to−Ambient − Steady State (Note 2)  
R
JA  
1. The entire application environment impacts the thermal resistance values  
shown, they are not constants and are only valid for the particular conditions  
noted.  
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
3. Maximum current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
August, 2016 − Rev. 2  
NVD5490NL/D  
 
123456

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