Datasheet > NU8500Q

NU8500Q

更新时间： 2024-04-09 18:59:19

品牌	Logo	应用领域
伏达半导体 - NUVOLTA		/
页数	文件大小	规格书
4页	239K
描述
NU8500Q is a highly integrated digital controller for wireless power transmitter compliant with WP

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数据手册

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NU8500Q 数据手册

NU8500Q

64 Pin, 16-Bit Digital Signal Controllers

with High-Resolution PWM and CAN Flexible Data (CAN FD)

Operating Conditions

Power Management

• 3.0V to 3.6V, -40°C to +125°C, DC to 100 MIPS

• Low-Power Management Modes (Sleep,

Idle, Doze)

• Integrated Power-on Reset and Brown-out Reset

Core: 16-Bit CPU

High-Speed PWM

• 256 Kbytes of Program Flash with ECC and

24K RAM

• 8 PWM Pairs

• Fast 6-Cycle Divide

• Up to 250 ps PWM Resolution

• Live Update

• Dead Time for Rising and Falling Edges

• Dead-Time Compensation

• Code Efficient (C and Assembly)Architecture

• 40-Bit Wide Accumulators

• Clock Chopping for High-Frequency Operation

• Fault and Current Limit Inputs

• Single-Cycle (MAC/MPY) with Dual Data Fetch

• Single-Cycle, Mixed-Sign MULPlus

Hardware Divide

• Flexible Trigger Configuration for ADCTriggering

• 32-Bit Multiply Support

Timers/Output Compare/Input Capture

• Four Sets of Interrupt Context Saving Registers

which Include Accumulator and STATUS forFast

Interrupt Handling

• One General Purpose Timer

• Peripheral Trigger Generator (PTG):

- Up to 15 trigger sources to other

peripheral modules

• Zero Overhead Looping

• RAM Memory Built-In Self-Test (MBIST)

- CPU independent state machine-based

instruction sequencer

Clock Management

• Nine MCCP/SCCP modules which IncludeTimer,

Capture/Compare and PWM:

• Internal Oscillator

• Programmable PLLs and Oscillator Clock Sources

• Reference Clock Output

- 1 MCCP

- 8 SCCPs

• Fail-Safe Clock Monitor (FSCM)

• Fast Wake-up and Start-up

• Backup Internal Oscillator

- 16 or 32-bit time base

- 16 or 32-bit capture

- 4-deep capture buffer

• Fully Asynchronous Operation, Available in

Sleep Modes

12 3 4

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