DATA SHEET
www.onsemi.com
MOSFET - Power, Single
N-Channel, WDFN8
25 V, 1.3 mW, 150 A
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
1.3 mW @ 10 V
1.8 mW @ 4.5 V
25 V
150 A
NTTFS1D8N02P1E
Features
NMOS
D (5−8)
• Small Footprint for Compact Design
• Low R
to Minimize Conduction Losses
• Low Q and Capacitance to Minimize Driver Losses
DS(on)
G
G (4)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
S (1, 2, 3)
Typical Applications
• DC−DC Converters
• Power Load Switch
MARKING
DIAGRAM
• Notebook Battery Management
1
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
2EMN
AYWWZZ
Parameter
Drain−to−Source Voltage
Symbol
Value
25
Unit
V
WDFN8
(Power33)
V
DSS
CASE 483AW
Gate−to−Source Voltage
V
+16, −12
150
V
GS
Continuous Drain
Current R
T
T
T
= 25°C
= 85°C
= 25°C
I
A
2EMN = Specific Device Code
C
C
C
D
A
Y
= Assembly Location
= Year
q
JC
108
Steady
State
(Note 1)
WW
ZZ
= Work Week
= Assembly Lot Code
Power Dissipation
P
46
W
A
D
D
D
R
(Note 1)
q
JC
Continuous Drain
Current R
T = 25°C
A
I
36
26
D
q
JA
PIN CONNECTIONS
T = 85°C
A
Steady
State
(Notes 1, 3)
Power Dissipation
T = 25°C
A
P
2.7
W
A
R
(Notes 1, 3)
q
JA
Continuous Drain
Current R
T = 25°C
A
I
20
14
D
q
JA
T = 85°C
A
Steady
State
(Notes 2, 3)
Power Dissipation
T = 25°C
A
P
0.8
W
R
(Notes 2, 3)
q
JA
Pulsed Drain Current T = 25°C, t = 10 ms
I
DM
508
117
A
(Top View)
A
p
Single Pulse Drain−to−Source Avalanche
Energy (I = 48.3 A, L = 0.1 mH) (Note 4)
E
AS
mJ
L(pk)
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
Operating Junction and Storage Temperature
Range
T , T
−55 to
°C
°C
J
stg
+150
Lead Temperature Soldering Reflow for Sol-
dering Purposes (1/8″ from case for 10 s)
T
L
260
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface−mounted on FR4 board using a 1 in pad size, 2 oz Cu pad.
2. Surface−mounted on FR4 board using minimum pad size, 2 oz Cu pad.
3. The entire application environment impacts the thermal resistance values shown.
They are not constants and are only valid for the particular conditions noted.
Actual continuous current will be limited by thermal & electro− mechanical
application board design. R
is determined by the user’s board design.
AV
q
CA
4. 100% UIS tested at L = 0.1 mH, I = 32 A.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
October, 2022 − Rev. 2
NTTFS1D8N02P1E/D