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NTE955S PDF预览

NTE955S

更新时间: 2024-09-23 22:50:55
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NTE /
页数 文件大小 规格书
4页 31K
描述
Integrated Circuit Timing Circuit

NTE955S 数据手册

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NTE955M  
NTE955S  
NTE955SM  
Integrated Circuit  
Timing Circuit  
Description:  
The NTE955 series timing circuit is a highly stable controller capable of producing accurate time de-  
lays, or oscillation. Additional terminals are provided for triggering or resetting if desired. In time delay  
mode of operation, the time is precisely controlled by one external resistor and capacitor. For astable  
operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled  
with two external resistors and one capacitor. The circuit may be triggered and reset on falling wave-  
forms, and the output structure can source or sink up to 200mA or drive TTL circuits.  
Features:  
D Direct Replacement for 555 Timers  
D Timing from Microseconds through Hours  
D Operates in Both Astable and Monostable Modes  
D Adjustable Duty Cycle  
D High Current Output Can Source or Sink 200mA  
D Output and Supply TTL Compatible TTL  
D Temperature Stability of 0.005% per °C  
D Normally “ON” or Normally “OFF” Output  
D Available in Three Types:  
NTE955M – 8–Lead DIP  
NTE955S – 8–Lead SIP  
NTE955SM – SOIC–8 (Surface Mount)  
Applications:  
D Precision Timing  
D Pulse Generation  
D Sequential Timing  
D Time Delay Generation  
D Pulse Width Modulation  
D Pulse Position Modulation  
D Linear Ramp Generator  

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