Datasheet > NTE7226

NTE7226

更新时间： 2024-01-19 21:42:53

品牌	Logo	应用领域
NTE		/
页数	文件大小	规格书
4页	77K
描述
Interface Circuit,

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NTE7226 技术参数

生命周期：	Active	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.66
Base Number Matches：	1

NTE7226 数据手册

NTE7226

Integrated Circuit

High Voltage, High Speed MOSFET/IGBT Driver

w/High and Low Side Outputs

14−Lead DIP Type Package

Description:

The NTE7226 is a high voltage, high speed power MOSFET and IGBT driver with independent high

and low side referenced output channels in a 14−Lead DIP type package. HVIC and latch immune

CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with

standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current

buffer stage designed for minimum driver cross−conduction. Propagation delays are matched to sim-

plify use in high frequency applications. The floating channel can be used to drive an N−Channel

power MOSFET or IGBT in the high side configuration which operates up to 500 volts.

Features:

D Floating Channel Designed for Bootstrap Operation

Fully Operational to +500V

Tolerant to Negative Transient Voltage

dV/dt Immune

D Gate Drive Supply Range from 10V to 20V

D Undervoltage Lockout for Both Channels

D 3.3V Logic Compatible

Separate Logic Supply Range from 3.3V to 20V

Logic an Power Ground 5V Offset

D CMOS Schmitt−Triggered Inputs with Pull−Down

D Cycle by Cycle Edge−Triggered Shutdown Logic

D Matched Propagation Delay for Both Channels

D Outputs in Phase with Inputs

Absolute Maximum Ratings: (Note 1)

High Side Floating Supply Voltage, V_B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 525V

High Side Floating Supply Offset Voltage, V_S. . . . . . . . . . . . . . . . . . . . . . . . . . . . V_B−25 to V_B+0.3V

High Side Floating Output Voltage, V_HO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_S−0.3 to V_B+0.3V

Low Side Fixed Supply Voltage, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +25V

Low Side Output Voltage, V_LO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to V_CC+0.3V

Logic Supply Voltage, V_DD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to V_SS+25V

Logic Supply Offset Voltage, V_SS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_CC−25 to V_CC+0.3V

Logic Input Voltage (HIN, LIN, & SD), V_IN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_SS−0.3 to V_DD+0.3V

Maximum Allowable Offset Supply Voltage Transient, dV_s/dt . . . . . . . . . . . . . . . . . . . . . . . . . . 50V/ns

Package Power Dissipation (T_A≤ +25°C), P_D. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6W

Note 1. Absolute Maximum Ratings indicate sustained limits beyond which damage to the device

may occur. All voltage parameters are absolute voltages referenced to COM. The thermal

resistance and power dissipation ratings are measured under board mounted and still air

conditions.

12 3 4

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