Datasheet > NTE7063

NTE7063

更新时间： 2024-01-30 20:48:06

品牌	Logo	应用领域
NTE		显示器
页数	文件大小	规格书
3页	28K
描述
Integrated Circuit CRT Display Synchronization Deflection Circuit

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技术参数
数据手册

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NTE7063 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.24
应用：	TV	消隐输出：	NO
商用集成电路类型：	HORIZ/VERT DEFLECTION IC	JESD-30 代码：	R-PDIP-T22
功能数量：	1	端子数量：	22
最高工作温度：	85 °C	最低工作温度：	-20 °C
封装主体材料：	PLASTIC/EPOXY	封装形状：	RECTANGULAR
封装形式：	IN-LINE	认证状态：	Not Qualified
最大供电电压 (Vsup)：	13.5 V	最小供电电压 (Vsup)：	9 V
表面贴装：	NO	温度等级：	OTHER
端子形式：	THROUGH-HOLE	端子位置：	DUAL
Base Number Matches：	1

NTE7063 数据手册

NTE7063

Integrated Circuit

CRT Display Synchronization Deflection Circuit

Description:

The NTE7063 is a sync–deflection circuit IC dedicated to CRT display use. It can be connected to

the NTE1773, NTE1797, or the NTE1855 (for vertical output use) to form a sync–deflection circuit that

meets every requirement for CRT use.

So far, ICs for color TV use have been applied to the sync–deflection circuit for CRT display use and

general purpose ICs such as one–shot multivibrators, inverters, and a lot of transistors have been

used to form the peripherals such as sync input interface, horizontal phase shifter. The NTE7063 con-

tains these peripherals on chip and adopts a stable circuit for horizontal oscillation from 15kHz to

100kHz aiming at improving the characteristics required for CRT display use.

The NTE7063 has independent GND pins for the horizontal block and vertical block, thus facilitating

pattern layout for applications where the NTE7063 is used at high frequencies.

Features:

D The Vertical Pull–In Range is Approximately 10Hz at f_V= 60Hz.

D The Horizontal Oscillation Frequency can be Adjusted Stably from 15kHz to 100kHz.

D The Horizontal Display can be Shifted Right/Left.

D The Horizontal/Vertical Sync Input can be Used Intact Regardless of the Difference in Pulse

Polarity and Pulse Width.

D The AFC Feedback Sawtooth Wave can be Obtained by Simply Applying a Flyback Pulse to

the IC as a Trigger Pulse.

D Any Duty of the Horizontal Pulse can be Set.

D Good Vertical Linearity because DC Bias at Vertical Output Stage is Subjected to Sampling

Control Within Retrace Time.

D Excellent Interlace and Vertical Jitter Characteristics on the High–Definition Display Because

of Independent GND Pins for the Horizontal Block and Vertical Block.

On–Chip Functions:

Horizontal Block

Vertical Block

D AFC

D Vertical OSC

D Horizontal OSC

D Vertical Sawtooth Wave Generator

D Sampling Type DC Voltage Control

D X–Ray Protector

D Horizontal Phase Shifter

D AFC Sawtooth Wave Generator

D Horizontal Pulse Duty Setting

12 3

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