Datasheet > NTE1979

NTE1979

更新时间： 2024-11-25 22:54:23

品牌	Logo	应用领域
NTE		/
页数	文件大小	规格书
2页	28K
描述
Integrated Circuit Negative 3 Terminal Voltage Regulator, -8V, 100mA

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NTE1979 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.07
Base Number Matches：	1

NTE1979 数据手册

NTE1979

Integrated Circuit

Negative 3 Terminal Voltage Regulator,

–8V, 100mA

Description:

The NTE1979 is a 3–terminal fixed negative output voltage regulatgor in a TO92 type package

designed for use in power circuits with current capacity up to 100mA. Stabilized fixed output voltage

is obtained from unstable DC input voltage without the use of external components.

Features:

D No External Components

D Output Current in Excess of 100mA

D Built–In Short–Circuit Current Limiting

D Built–In Thermal Overload Protection

Absolute Maximum Ratings: (T_A= +25°C unless otherwise specified)

Input Voltage, V_I. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –35V

Power Dissipation (Note 1), P_D. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650mW

Operating Ambient Temperature Range, T_opr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20° to +80°C

Storage Temperature Range, T_stg. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C

Note 1. When T_Jexceeds +150°C, the internal circuit cuts off the output.

Electrical Characteristics: (T_A= +25°C, V_I= –14V, I_O= 40mA, C_i= 2µF, C_o= 1µF unless

otherwise specified)

Parameter

Output Voltage

Symbol

Test Conditions

Min

Typ Max Unit

T = +25°C

–7.68 –8.0 –8.32

Output Voltage Tolerance

V = –11V to –23V, I = 1mA to 70mA,

–7.6

–

–8.4

T = 0° to +125°C

Line Regulation

REG

V = –10V to –24V, T = +25°C

–

160

V = –11V to –21V, T = +25°C

Load Regulation

REG

I = 1mA to 100mA, T = +25°C

I = 1mA to 40mA, T = +25°C

Note 2. The specified condition T_J= +25°C means that the test should be carried out with the test

time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction

temperature can be ignored.

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